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Searched refs:RCC_PLL3CFGR1_DIVN (Results 1 – 25 of 28) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dsystem_stm32mp1xx.c225 …pll3vco = (float)((float)((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVN) + 1U) + (fracn1 / (float) 0x1FFF)); in SystemCoreClockUpdate()
Dstm32mp151dxx_ca7.h25264 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp151fxx_cm4.h25427 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp151axx_ca7.h25264 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp151axx_cm4.h25230 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp151dxx_cm4.h25230 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp151cxx_ca7.h25461 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp151cxx_cm4.h25427 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp151fxx_ca7.h25461 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp153axx_ca7.h26815 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp153axx_cm4.h26781 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp153cxx_ca7.h27012 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp153cxx_cm4.h26978 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp153dxx_ca7.h26815 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp153dxx_cm4.h26781 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp153fxx_ca7.h27012 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp153fxx_cm4.h26978 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp157axx_ca7.h28038 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp157axx_cm4.h28004 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp157cxx_ca7.h28235 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp157cxx_cm4.h28201 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
Dstm32mp157dxx_ca7.h28038 #define RCC_PLL3CFGR1_DIVN RCC_PLL3CFGR1_DIVN_Msk … macro
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_rcc.c1864 …RCC_OscInitStruct->PLL3.PLLN = (uint32_t)((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVN) >> RCC_PLL3CFGR1_D… in HAL_RCC_GetOscConfig()
2110 …pll3vco = (float)((float)((RCC->PLL3CFGR1 & RCC_PLL3CFGR1_DIVN) + 1U) + (fracn1 / (float) 0x2000))… in HAL_RCC_GetPLL3ClockFreq()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_rcc.h4687 return (uint32_t)((READ_BIT(RCC->PLL3CFGR1, RCC_PLL3CFGR1_DIVN) >> RCC_PLL3CFGR1_DIVN_Pos) + 1U); in LL_RCC_PLL3_GetN()
4760 MODIFY_REG(RCC->PLL3CFGR1, RCC_PLL3CFGR1_DIVN, (DIVN - 1U) << RCC_PLL3CFGR1_DIVN_Pos); in LL_RCC_PLL3_SetN()
Dstm32mp1xx_hal_rcc.h3533 do{ MODIFY_REG( RCC->PLL3CFGR1, (RCC_PLL3CFGR1_DIVN | RCC_PLL3CFGR1_DIVM3) , \

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