Searched refs:RCC_PLL2DIVR2_DIVT_Pos (Results 1 – 7 of 7) sorted by relevance
1581 pllt = ((RCC->PLL2DIVR2 & RCC_PLL2DIVR2_DIVT) >> RCC_PLL2DIVR2_DIVT_Pos) + 1U; in HAL_RCC_GetPLL2TFreq()1776 RCC_OscInitStruct->PLL2.PLLT = (((regvalue & RCC_PLL2DIVR2_DIVT) >> RCC_PLL2DIVR2_DIVT_Pos) + 1U); in HAL_RCC_GetOscConfig()2044 ((pPLLInit->PLLT - 1U) << RCC_PLL2DIVR2_DIVT_Pos))); in RCC_PLL_Config()
4557 …return (uint32_t)((READ_BIT(RCC->PLL2DIVR2, RCC_PLL2DIVR2_DIVT) >> RCC_PLL2DIVR2_DIVT_Pos) + 1UL); in LL_RCC_PLL2_GetT()4644 MODIFY_REG(RCC->PLL2DIVR2, RCC_PLL2DIVR2_DIVT, (T - 1UL) << RCC_PLL2DIVR2_DIVT_Pos); in LL_RCC_PLL2_SetT()
4091 ((((__PLL2T__) - 1U) << RCC_PLL2DIVR2_DIVT_Pos) & RCC_PLL2DIVR2_DIVT))); \
15703 #define RCC_PLL2DIVR2_DIVT_Pos (8U) macro15704 #define RCC_PLL2DIVR2_DIVT_Msk (0x7UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000700 */15706 #define RCC_PLL2DIVR2_DIVT_0 (0x1UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000100 */15707 #define RCC_PLL2DIVR2_DIVT_1 (0x2UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000200 */15708 #define RCC_PLL2DIVR2_DIVT_2 (0x4UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000400 */
16761 #define RCC_PLL2DIVR2_DIVT_Pos (8U) macro16762 #define RCC_PLL2DIVR2_DIVT_Msk (0x7UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000700 */16764 #define RCC_PLL2DIVR2_DIVT_0 (0x1UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000100 */16765 #define RCC_PLL2DIVR2_DIVT_1 (0x2UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000200 */16766 #define RCC_PLL2DIVR2_DIVT_2 (0x4UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000400 */
16341 #define RCC_PLL2DIVR2_DIVT_Pos (8U) macro16342 #define RCC_PLL2DIVR2_DIVT_Msk (0x7UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000700 */16344 #define RCC_PLL2DIVR2_DIVT_0 (0x1UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000100 */16345 #define RCC_PLL2DIVR2_DIVT_1 (0x2UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000200 */16346 #define RCC_PLL2DIVR2_DIVT_2 (0x4UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000400 */
16121 #define RCC_PLL2DIVR2_DIVT_Pos (8U) macro16122 #define RCC_PLL2DIVR2_DIVT_Msk (0x7UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000700 */16124 #define RCC_PLL2DIVR2_DIVT_0 (0x1UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000100 */16125 #define RCC_PLL2DIVR2_DIVT_1 (0x2UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000200 */16126 #define RCC_PLL2DIVR2_DIVT_2 (0x4UL << RCC_PLL2DIVR2_DIVT_Pos) /*!< 0x00000400 */
