Searched refs:RCC_PLL2DIVR2_DIVS_Pos (Results 1 – 6 of 6) sorted by relevance
1566 plls = ((RCC->PLL2DIVR2 & RCC_PLL2DIVR2_DIVS) >> RCC_PLL2DIVR2_DIVS_Pos) + 1U; in HAL_RCC_GetPLL2SFreq()1775 RCC_OscInitStruct->PLL2.PLLS = (((regvalue & RCC_PLL2DIVR2_DIVS) >> RCC_PLL2DIVR2_DIVS_Pos) + 1U); in HAL_RCC_GetOscConfig()
4547 …return (uint32_t)((READ_BIT(RCC->PLL2DIVR2, RCC_PLL2DIVR2_DIVS) >> RCC_PLL2DIVR2_DIVS_Pos) + 1UL); in LL_RCC_PLL2_GetS()4633 MODIFY_REG(RCC->PLL2DIVR2, RCC_PLL2DIVR2_DIVS, (S - 1UL) << RCC_PLL2DIVR2_DIVS_Pos); in LL_RCC_PLL2_SetS()
15696 #define RCC_PLL2DIVR2_DIVS_Pos (0U) macro15697 #define RCC_PLL2DIVR2_DIVS_Msk (0x7UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000007 */15699 #define RCC_PLL2DIVR2_DIVS_0 (0x1UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000001 */15700 #define RCC_PLL2DIVR2_DIVS_1 (0x2UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000002 */15701 #define RCC_PLL2DIVR2_DIVS_2 (0x4UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000004 */
16754 #define RCC_PLL2DIVR2_DIVS_Pos (0U) macro16755 #define RCC_PLL2DIVR2_DIVS_Msk (0x7UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000007 */16757 #define RCC_PLL2DIVR2_DIVS_0 (0x1UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000001 */16758 #define RCC_PLL2DIVR2_DIVS_1 (0x2UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000002 */16759 #define RCC_PLL2DIVR2_DIVS_2 (0x4UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000004 */
16334 #define RCC_PLL2DIVR2_DIVS_Pos (0U) macro16335 #define RCC_PLL2DIVR2_DIVS_Msk (0x7UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000007 */16337 #define RCC_PLL2DIVR2_DIVS_0 (0x1UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000001 */16338 #define RCC_PLL2DIVR2_DIVS_1 (0x2UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000002 */16339 #define RCC_PLL2DIVR2_DIVS_2 (0x4UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000004 */
16114 #define RCC_PLL2DIVR2_DIVS_Pos (0U) macro16115 #define RCC_PLL2DIVR2_DIVS_Msk (0x7UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000007 */16117 #define RCC_PLL2DIVR2_DIVS_0 (0x1UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000001 */16118 #define RCC_PLL2DIVR2_DIVS_1 (0x2UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000002 */16119 #define RCC_PLL2DIVR2_DIVS_2 (0x4UL << RCC_PLL2DIVR2_DIVS_Pos) /*!< 0x00000004 */
