Searched refs:RCC_PLL2DIVR1_DIVQ (Results 1 – 7 of 7) sorted by relevance
1536 pllq = ((RCC->PLL2DIVR1 & RCC_PLL2DIVR1_DIVQ) >> RCC_PLL2DIVR1_DIVQ_Pos) + 1U; in HAL_RCC_GetPLL2QFreq()1773 RCC_OscInitStruct->PLL2.PLLQ = (((regvalue & RCC_PLL2DIVR1_DIVQ) >> RCC_PLL2DIVR1_DIVQ_Pos) + 1U); in HAL_RCC_GetOscConfig()
4527 …return (uint32_t)((READ_BIT(RCC->PLL2DIVR1, RCC_PLL2DIVR1_DIVQ) >> RCC_PLL2DIVR1_DIVQ_Pos) + 1UL); in LL_RCC_PLL2_GetQ()4611 MODIFY_REG(RCC->PLL2DIVR1, RCC_PLL2DIVR1_DIVQ, (Q - 1UL) << RCC_PLL2DIVR1_DIVQ_Pos); in LL_RCC_PLL2_SetQ()
4087 … ((((__PLL2Q__) - 1U) << RCC_PLL2DIVR1_DIVQ_Pos) & RCC_PLL2DIVR1_DIVQ) | \
14932 #define RCC_PLL2DIVR1_DIVQ RCC_PLL2DIVR1_DIVQ_Msk /*!< DIVQ2[6:0] bits: … macro
15966 #define RCC_PLL2DIVR1_DIVQ RCC_PLL2DIVR1_DIVQ_Msk /*!< DIVQ2[6:0] bits: … macro
15564 #define RCC_PLL2DIVR1_DIVQ RCC_PLL2DIVR1_DIVQ_Msk /*!< DIVQ2[6:0] bits: … macro
15332 #define RCC_PLL2DIVR1_DIVQ RCC_PLL2DIVR1_DIVQ_Msk /*!< DIVQ2[6:0] bits: … macro