Searched refs:RCC_PLL2DIVR1_DIVN_Pos (Results 1 – 5 of 5) sorted by relevance
4497 …return (uint32_t)((READ_BIT(RCC->PLL2DIVR1, RCC_PLL2DIVR1_DIVN) >> RCC_PLL2DIVR1_DIVN_Pos) + 1UL); in LL_RCC_PLL2_GetN()4578 MODIFY_REG(RCC->PLL2DIVR1, RCC_PLL2DIVR1_DIVN, (N - 1UL) << RCC_PLL2DIVR1_DIVN_Pos); in LL_RCC_PLL2_SetN()
14906 #define RCC_PLL2DIVR1_DIVN_Pos (0U) macro14907 #define RCC_PLL2DIVR1_DIVN_Msk (0x1FFUL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x000001FF */14909 #define RCC_PLL2DIVR1_DIVN_0 (0x001UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000001 */14910 #define RCC_PLL2DIVR1_DIVN_1 (0x002UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000002 */14911 #define RCC_PLL2DIVR1_DIVN_2 (0x004UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000004 */14912 #define RCC_PLL2DIVR1_DIVN_3 (0x008UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000008 */14913 #define RCC_PLL2DIVR1_DIVN_4 (0x010UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000010 */14914 #define RCC_PLL2DIVR1_DIVN_5 (0x020UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000020 */14915 #define RCC_PLL2DIVR1_DIVN_6 (0x040UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000040 */14916 #define RCC_PLL2DIVR1_DIVN_7 (0x080UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000080 */[all …]
15940 #define RCC_PLL2DIVR1_DIVN_Pos (0U) macro15941 #define RCC_PLL2DIVR1_DIVN_Msk (0x1FFUL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x000001FF */15943 #define RCC_PLL2DIVR1_DIVN_0 (0x001UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000001 */15944 #define RCC_PLL2DIVR1_DIVN_1 (0x002UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000002 */15945 #define RCC_PLL2DIVR1_DIVN_2 (0x004UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000004 */15946 #define RCC_PLL2DIVR1_DIVN_3 (0x008UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000008 */15947 #define RCC_PLL2DIVR1_DIVN_4 (0x010UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000010 */15948 #define RCC_PLL2DIVR1_DIVN_5 (0x020UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000020 */15949 #define RCC_PLL2DIVR1_DIVN_6 (0x040UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000040 */15950 #define RCC_PLL2DIVR1_DIVN_7 (0x080UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000080 */[all …]
15538 #define RCC_PLL2DIVR1_DIVN_Pos (0U) macro15539 #define RCC_PLL2DIVR1_DIVN_Msk (0x1FFUL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x000001FF */15541 #define RCC_PLL2DIVR1_DIVN_0 (0x001UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000001 */15542 #define RCC_PLL2DIVR1_DIVN_1 (0x002UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000002 */15543 #define RCC_PLL2DIVR1_DIVN_2 (0x004UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000004 */15544 #define RCC_PLL2DIVR1_DIVN_3 (0x008UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000008 */15545 #define RCC_PLL2DIVR1_DIVN_4 (0x010UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000010 */15546 #define RCC_PLL2DIVR1_DIVN_5 (0x020UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000020 */15547 #define RCC_PLL2DIVR1_DIVN_6 (0x040UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000040 */15548 #define RCC_PLL2DIVR1_DIVN_7 (0x080UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000080 */[all …]
15306 #define RCC_PLL2DIVR1_DIVN_Pos (0U) macro15307 #define RCC_PLL2DIVR1_DIVN_Msk (0x1FFUL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x000001FF */15309 #define RCC_PLL2DIVR1_DIVN_0 (0x001UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000001 */15310 #define RCC_PLL2DIVR1_DIVN_1 (0x002UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000002 */15311 #define RCC_PLL2DIVR1_DIVN_2 (0x004UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000004 */15312 #define RCC_PLL2DIVR1_DIVN_3 (0x008UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000008 */15313 #define RCC_PLL2DIVR1_DIVN_4 (0x010UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000010 */15314 #define RCC_PLL2DIVR1_DIVN_5 (0x020UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000020 */15315 #define RCC_PLL2DIVR1_DIVN_6 (0x040UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000040 */15316 #define RCC_PLL2DIVR1_DIVN_7 (0x080UL << RCC_PLL2DIVR1_DIVN_Pos) /*!< 0x00000080 */[all …]
