Searched refs:RCC_PLL2DIVR1_DIVN (Results 1 – 7 of 7) sorted by relevance
1770 RCC_OscInitStruct->PLL2.PLLN = ((regvalue & RCC_PLL2DIVR1_DIVN) + 1U); in HAL_RCC_GetOscConfig()2184 plln = (tmpreg2 & RCC_PLL2DIVR1_DIVN) + 1U; in RCC_PLL2_GetVCOOutputFreq()
4497 …return (uint32_t)((READ_BIT(RCC->PLL2DIVR1, RCC_PLL2DIVR1_DIVN) >> RCC_PLL2DIVR1_DIVN_Pos) + 1UL); in LL_RCC_PLL2_GetN()4578 MODIFY_REG(RCC->PLL2DIVR1, RCC_PLL2DIVR1_DIVN, (N - 1UL) << RCC_PLL2DIVR1_DIVN_Pos); in LL_RCC_PLL2_SetN()
4085 WRITE_REG(RCC->PLL2DIVR1, ((((__PLL2N__) - 1U) & RCC_PLL2DIVR1_DIVN) | \
14908 #define RCC_PLL2DIVR1_DIVN RCC_PLL2DIVR1_DIVN_Msk /*!< DIVN2[8:0] bits: … macro
15942 #define RCC_PLL2DIVR1_DIVN RCC_PLL2DIVR1_DIVN_Msk /*!< DIVN2[8:0] bits: … macro
15540 #define RCC_PLL2DIVR1_DIVN RCC_PLL2DIVR1_DIVN_Msk /*!< DIVN2[8:0] bits: … macro
15308 #define RCC_PLL2DIVR1_DIVN RCC_PLL2DIVR1_DIVN_Msk /*!< DIVN2[8:0] bits: … macro
