Searched refs:RCC_PLL2CFGR3_PLL2PDIV2_Pos (Results 1 – 9 of 9) sorted by relevance
330 pllp2 = (pllcfgr & RCC_PLL2CFGR3_PLL2PDIV2) >> RCC_PLL2CFGR3_PLL2PDIV2_Pos; in SystemCoreClockUpdate()
387 pllp2 = (pllcfgr & RCC_PLL2CFGR3_PLL2PDIV2) >> RCC_PLL2CFGR3_PLL2PDIV2_Pos; in SystemCoreClockUpdate()
25446 #define RCC_PLL2CFGR3_PLL2PDIV2_Pos (24U) macro25447 #define RCC_PLL2CFGR3_PLL2PDIV2_Msk (0x7UL << RCC_PLL2CFGR3_PLL2PDIV2_Pos)/*!< 0x070000…
26595 #define RCC_PLL2CFGR3_PLL2PDIV2_Pos (24U) macro26596 #define RCC_PLL2CFGR3_PLL2PDIV2_Msk (0x7UL << RCC_PLL2CFGR3_PLL2PDIV2_Pos)/*!< 0x070000…
26353 #define RCC_PLL2CFGR3_PLL2PDIV2_Pos (24U) macro26354 #define RCC_PLL2CFGR3_PLL2PDIV2_Msk (0x7UL << RCC_PLL2CFGR3_PLL2PDIV2_Pos)/*!< 0x070000…
25688 #define RCC_PLL2CFGR3_PLL2PDIV2_Pos (24U) macro25689 #define RCC_PLL2CFGR3_PLL2PDIV2_Msk (0x7UL << RCC_PLL2CFGR3_PLL2PDIV2_Pos)/*!< 0x070000…
1701 …scInitStruct->PLL2.PLLP2 = ((cfgr_value & RCC_PLL2CFGR3_PLL2PDIV2) >> RCC_PLL2CFGR3_PLL2PDIV2_Pos); in HAL_RCC_GetOscConfig()
5588 MODIFY_REG(RCC->PLL2CFGR3, RCC_PLL2CFGR3_PLL2PDIV2, P2 << RCC_PLL2CFGR3_PLL2PDIV2_Pos); in LL_RCC_PLL2_SetP2()5598 …eturn (uint32_t)(READ_BIT(RCC->PLL2CFGR3, RCC_PLL2CFGR3_PLL2PDIV2) >> RCC_PLL2CFGR3_PLL2PDIV2_Pos); in LL_RCC_PLL2_GetP2()
3745 ((((__PLLP2__) << RCC_PLL2CFGR3_PLL2PDIV2_Pos) & RCC_PLL2CFGR3_PLL2PDIV2)))); \