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Searched refs:RCC_PLL2CFGR1_PLL2BYP (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dsystem_stm32n6xx_s.c322 pllbypass = pllcfgr & RCC_PLL2CFGR1_PLL2BYP; in SystemCoreClockUpdate()
Dsystem_stm32n6xx_fsbl.c379 pllbypass = pllcfgr & RCC_PLL2CFGR1_PLL2BYP; in SystemCoreClockUpdate()
Dstm32n645xx.h25411 #define RCC_PLL2CFGR1_PLL2BYP RCC_PLL2CFGR1_PLL2BYP_Msk /*!< PLL2 bypa… macro
Dstm32n657xx.h26560 #define RCC_PLL2CFGR1_PLL2BYP RCC_PLL2CFGR1_PLL2BYP_Msk /*!< PLL2 bypa… macro
Dstm32n655xx.h26318 #define RCC_PLL2CFGR1_PLL2BYP RCC_PLL2CFGR1_PLL2BYP_Msk /*!< PLL2 bypa… macro
Dstm32n647xx.h25653 #define RCC_PLL2CFGR1_PLL2BYP RCC_PLL2CFGR1_PLL2BYP_Msk /*!< PLL2 bypa… macro
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h5373 SET_BIT(RCC->PLL2CFGR1, RCC_PLL2CFGR1_PLL2BYP); in LL_RCC_PLL2_EnableBypass()
5384 CLEAR_BIT(RCC->PLL2CFGR1, RCC_PLL2CFGR1_PLL2BYP); in LL_RCC_PLL2_DisableBypass()
5394 return ((READ_BIT(RCC->PLL2CFGR1, RCC_PLL2CFGR1_PLL2BYP) == RCC_PLL2CFGR1_PLL2BYP) ? 1UL : 0UL); in LL_RCC_PLL2_IsEnabledBypass()
Dstm32n6xx_hal_rcc.h3740 …MODIFY_REG(RCC->PLL2CFGR1, (RCC_PLL2CFGR1_PLL2SEL | RCC_PLL2CFGR1_PLL2BYP | RCC_PLL2CFGR1_PLL2DIVM…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c1706 if ((cfgr_value & RCC_PLL2CFGR1_PLL2BYP) != 0UL) in HAL_RCC_GetOscConfig()