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Searched refs:RCC_PLL2CFGR1_DIVN (Results 1 – 25 of 27) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_rcc.c1822 …RCC_OscInitStruct->PLL2.PLLN = (uint32_t)((RCC->PLL2CFGR1 & RCC_PLL2CFGR1_DIVN) >> RCC_PLL2CFGR1_D… in HAL_RCC_GetOscConfig()
2053 …pll2vco = (float)((float)((RCC->PLL2CFGR1 & RCC_PLL2CFGR1_DIVN) + 1U) + (fracn1 / (float)0x2000));… in HAL_RCC_GetPLL2ClockFreq()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_rcc.h4316 return (uint32_t)((READ_BIT(RCC->PLL2CFGR1, RCC_PLL2CFGR1_DIVN) >> RCC_PLL2CFGR1_DIVN_Pos) + 1U); in LL_RCC_PLL2_GetN()
4377 MODIFY_REG(RCC->PLL2CFGR1, RCC_PLL2CFGR1_DIVN, (DIVN - 1U) << RCC_PLL2CFGR1_DIVN_Pos); in LL_RCC_PLL2_SetN()
Dstm32mp1xx_hal_rcc.h3344 do{ MODIFY_REG( RCC->PLL2CFGR1, (RCC_PLL2CFGR1_DIVN | RCC_PLL2CFGR1_DIVM2) , \
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h23389 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp151fxx_cm4.h23552 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp151axx_ca7.h23389 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp151axx_cm4.h23355 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp151dxx_cm4.h23355 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp151cxx_ca7.h23586 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp151cxx_cm4.h23552 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp151fxx_ca7.h23586 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp153axx_ca7.h24940 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp153axx_cm4.h24906 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp153cxx_ca7.h25137 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp153cxx_cm4.h25103 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp153dxx_ca7.h24940 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp153dxx_cm4.h24906 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp153fxx_ca7.h25137 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp153fxx_cm4.h25103 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp157axx_ca7.h26163 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp157axx_cm4.h26129 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp157cxx_ca7.h26360 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp157cxx_cm4.h26326 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp157dxx_ca7.h26163 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro
Dstm32mp157dxx_cm4.h26129 #define RCC_PLL2CFGR1_DIVN RCC_PLL2CFGR1_DIVN_Msk … macro

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