Searched refs:RCC_PLL1_DIVP (Results 1 – 10 of 10) sorted by relevance
608 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); in HAL_RCCEx_PeriphCLKConfig()660 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); in HAL_RCCEx_PeriphCLKConfig()747 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); in HAL_RCCEx_PeriphCLKConfig()784 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); in HAL_RCCEx_PeriphCLKConfig()988 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); in HAL_RCCEx_PeriphCLKConfig()1241 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); in HAL_RCCEx_PeriphCLKConfig()1535 if (__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL1_DIVP) != 0U) in HAL_RCCEx_GetPLL1ClockFreq()
122 #define IS_RCC_PLLCLOCKOUT_VALUE(VALUE) (((VALUE) == RCC_PLL1_DIVP) || \
985 __HAL_RCC_PLL1CLKOUT_DISABLE(RCC_PLL1_DIVP | RCC_PLL1_DIVQ | RCC_PLL1_DIVR); in RCC_PLL1_Config()1096 __HAL_RCC_PLL1CLKOUT_ENABLE(RCC_PLL1_DIVP | RCC_PLL1_DIVQ | RCC_PLL1_DIVR); in RCC_PLL1_Config()1101 __HAL_RCC_PLL1CLKOUT_DISABLE(RCC_PLL1_DIVP | RCC_PLL1_DIVQ | RCC_PLL1_DIVR); in RCC_PLL1_Config()
908 __HAL_RCC_PLL1_CLKOUT_ENABLE(RCC_PLL1_DIVP); in HAL_RCC_OscConfig()
2829 if (__HAL_RCC_GET_PLL1_CLKOUT_CONFIG(RCC_PLL1_DIVP) != 0U) in HAL_RCCEx_GetPLL1ClockFreq()
811 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); in HAL_RCC_OscConfig()
853 #define RCC_PLL1_DIVP RCC_PLL1CR_DIVPEN macro857 #define IS_RCC_PLL1CLOCKOUT_VALUE(VALUE) (((VALUE) == RCC_PLL1_DIVP) || \
262 #define RCC_PLL1_DIVP RCC_PLL1CFGR_PLL1PEN macro4976 #define IS_RCC_PLL1_CLOCKOUT_VALUE(VALUE) (((VALUE) == RCC_PLL1_DIVP) || \
330 #define RCC_PLL1_DIVP RCC_PLL1CFGR_PLL1PEN macro
274 #define RCC_PLL1_DIVP RCC_PLLCFGR_DIVP1EN macro8095 #define IS_RCC_PLLCLOCKOUT_VALUE(VALUE) (((VALUE) == RCC_PLL1_DIVP) || \
