Searched refs:RCC_PLL1DIVR_Q1 (Results 1 – 25 of 26) sorted by relevance
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865 …((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLL… in HAL_RCC_OscConfig()1704 …RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos)… in HAL_RCC_GetOscConfig()
3123 … (uint32_t)(float_t)(pll1vco / ((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_Q1) >> 16) + (fl… in HAL_RCCEx_GetPLL1ClockFreq()
4541 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) + 1UL); in LL_RCC_PLL1_GetQ()4607 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_Q1, (Q - 1UL) << RCC_PLL1DIVR_Q1_Pos); in LL_RCC_PLL1_SetQ()
7594 …((((__PLLQ1__) -1U) << 16U)& RCC_PLL1DIVR_Q1) | ((((__PLLR1__) - 1U) << 24U)& RCC_PLL1DIVR_R1))); \
13133 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
13577 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
13589 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
13145 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
13584 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
13596 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
15445 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
15433 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
14994 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
14319 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
14982 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
15212 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
15218 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
15525 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
14949 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
15794 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
18951 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
18682 #define RCC_PLL1DIVR_Q1 RCC_PLL1DIVR_Q1_Msk macro
