RCC_PLL1DIVR_PLL1Q_Pos (reference) in projects: hal_stm32-latest

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Searched refs:RCC_PLL1DIVR_PLL1Q_Pos (Results 1 – 25 of 34) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
D	stm32wbaxx_hal_rcc.c	`818 ((RCC_OscInitStruct->PLL1.PLLQ - 1u) << RCC_PLL1DIVR_PLL1Q_Pos) \| in HAL_RCC_OscConfig() 887 …(((tmpreg2 & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) != (RCC_OscInitStruct->PLL1.PLLQ - 1u)… in HAL_RCC_OscConfig() 1410 pllq = ((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1U; in HAL_RCC_GetPLL1QFreq() 1505 RCC_OscInitStruct->PLL1.PLLQ = (((regvalue & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1U); in HAL_RCC_GetOscConfig()`
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
D	stm32wbaxx_ll_rcc.h	`2357 …L1DIVR_PLL1Q, ((PLLN - 1UL) << RCC_PLL1DIVR_PLL1N_Pos) \| ((PLLQ - 1UL) << RCC_PLL1DIVR_PLL1Q_Pos)); in LL_RCC_PLL1_ConfigDomain_PLL1Q() 2439 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q, (PLL1Q - 1UL) << RCC_PLL1DIVR_PLL1Q_Pos); in LL_RCC_PLL1_SetQ() 2450 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1UL); in LL_RCC_PLL1_GetQ()`
D	stm32wbaxx_hal_rcc.h	`2027 …(((__PLL1P__) - 1U) << RCC_PLL1DIVR_PLL1P_Pos) \| (((__PLL1Q__) - 1U) << RCC_PLL1DIVR_PLL1Q_Pos) \| \`
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
D	stm32h5xx_hal_rcc.c	`960 RCC_PLL1DIVR_PLL1Q_Pos) != (pOscInitStruct->PLL.PLLQ - 1U)) \|\| in HAL_RCC_OscConfig() 1607 …pOscInitStruct->PLL.PLLQ = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) +… in HAL_RCC_GetOscConfig()`
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
D	stm32u5xx_hal_rcc.c	`1281 RCC_PLL1DIVR_PLL1Q_Pos) != (pRCC_OscInitStruct->PLL.PLLQ - 1U)) \|\| in HAL_RCC_OscConfig() 1943 …InitStruct->PLL.PLLQ = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1U); in HAL_RCC_GetOscConfig()`
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_ll_rcc.h	`3952 RCC_PLL1DIVR_PLL1Q_Pos)); in LL_RCC_PLL1_ConfigDomain_48M() 4041 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q, (PLL1Q - 1UL) << RCC_PLL1DIVR_PLL1Q_Pos); in LL_RCC_PLL1_SetQ() 4053 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1UL); in LL_RCC_PLL1_GetQ()`
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
D	stm32wba50xx.h	6051 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 6052 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 6054 #define RCC_PLL1DIVR_PLL1Q_0 (0x01UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 6055 #define RCC_PLL1DIVR_PLL1Q_1 (0x02UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 6056 #define RCC_PLL1DIVR_PLL1Q_2 (0x04UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 6057 #define RCC_PLL1DIVR_PLL1Q_3 (0x08UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 6058 #define RCC_PLL1DIVR_PLL1Q_4 (0x10UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 6059 #define RCC_PLL1DIVR_PLL1Q_5 (0x20UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 6060 #define RCC_PLL1DIVR_PLL1Q_6 (0x40UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32wba52xx.h	9825 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 9826 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 9828 #define RCC_PLL1DIVR_PLL1Q_0 (0x01UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 9829 #define RCC_PLL1DIVR_PLL1Q_1 (0x02UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 9830 #define RCC_PLL1DIVR_PLL1Q_2 (0x04UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 9831 #define RCC_PLL1DIVR_PLL1Q_3 (0x08UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 9832 #define RCC_PLL1DIVR_PLL1Q_4 (0x10UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 9833 #define RCC_PLL1DIVR_PLL1Q_5 (0x20UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 9834 #define RCC_PLL1DIVR_PLL1Q_6 (0x40UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32wba54xx.h	10097 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 10098 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 10100 #define RCC_PLL1DIVR_PLL1Q_0 (0x01UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 10101 #define RCC_PLL1DIVR_PLL1Q_1 (0x02UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 10102 #define RCC_PLL1DIVR_PLL1Q_2 (0x04UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 10103 #define RCC_PLL1DIVR_PLL1Q_3 (0x08UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 10104 #define RCC_PLL1DIVR_PLL1Q_4 (0x10UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 10105 #define RCC_PLL1DIVR_PLL1Q_5 (0x20UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 10106 #define RCC_PLL1DIVR_PLL1Q_6 (0x40UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32wba5mxx.h	10115 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 10116 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 10118 #define RCC_PLL1DIVR_PLL1Q_0 (0x01UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 10119 #define RCC_PLL1DIVR_PLL1Q_1 (0x02UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 10120 #define RCC_PLL1DIVR_PLL1Q_2 (0x04UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 10121 #define RCC_PLL1DIVR_PLL1Q_3 (0x08UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 10122 #define RCC_PLL1DIVR_PLL1Q_4 (0x10UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 10123 #define RCC_PLL1DIVR_PLL1Q_5 (0x20UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 10124 #define RCC_PLL1DIVR_PLL1Q_6 (0x40UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32wba55xx.h	10115 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 10116 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 10118 #define RCC_PLL1DIVR_PLL1Q_0 (0x01UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 10119 #define RCC_PLL1DIVR_PLL1Q_1 (0x02UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 10120 #define RCC_PLL1DIVR_PLL1Q_2 (0x04UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 10121 #define RCC_PLL1DIVR_PLL1Q_3 (0x08UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 10122 #define RCC_PLL1DIVR_PLL1Q_4 (0x10UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 10123 #define RCC_PLL1DIVR_PLL1Q_5 (0x20UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 10124 #define RCC_PLL1DIVR_PLL1Q_6 (0x40UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
D	stm32h503xx.h	8579 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 8580 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 8582 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 8583 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 8584 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 8585 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 8586 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 8587 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 8588 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32h523xx.h	12755 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 12756 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 12758 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 12759 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 12760 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 12761 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 12762 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 12763 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 12764 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32h562xx.h	13435 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 13436 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 13438 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 13439 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 13440 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 13441 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 13442 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 13443 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 13444 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32h533xx.h	13274 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 13275 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 13277 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 13278 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 13279 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 13280 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 13281 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 13282 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 13283 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32h573xx.h	16038 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 16039 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 16041 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 16042 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 16043 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 16044 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 16045 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 16046 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 16047 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32h563xx.h	15519 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 15520 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 15522 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 15523 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 15524 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 15525 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 15526 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 15527 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 15528 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
D	stm32h5xx_ll_rcc.h	`4414 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q, (PLL1Q - 1UL) << RCC_PLL1DIVR_PLL1Q_Pos); in LL_RCC_PLL1_SetQ() 4425 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1UL); in LL_RCC_PLL1_GetQ()`
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
D	stm32u545xx.h	14595 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 14596 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 14598 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 14599 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 14600 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 14601 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 14602 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 14603 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 14604 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32u535xx.h	14082 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 14083 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 14085 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 14086 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 14087 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 14088 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 14089 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 14090 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 14091 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32u575xx.h	15490 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 15491 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 15493 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 15494 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 15495 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 15496 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 15497 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 15498 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 15499 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32u585xx.h	16052 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 16053 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 16055 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 16056 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 16057 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 16058 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 16059 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 16060 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 16061 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32u595xx.h	16518 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 16519 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 16521 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 16522 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 16523 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 16524 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 16525 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 16526 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 16527 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32u5a5xx.h	17080 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 17081 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 17083 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 17084 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 17085 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 17086 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 17087 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 17088 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 17089 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…
D	stm32u5f7xx.h	18051 #define RCC_PLL1DIVR_PLL1Q_Pos (16U) macro 18052 #define RCC_PLL1DIVR_PLL1Q_Msk (0x7FUL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x007F0000… 18054 #define RCC_PLL1DIVR_PLL1Q_0 (0x001UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00010000… 18055 #define RCC_PLL1DIVR_PLL1Q_1 (0x002UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00020000… 18056 #define RCC_PLL1DIVR_PLL1Q_2 (0x004UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00040000… 18057 #define RCC_PLL1DIVR_PLL1Q_3 (0x008UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00080000… 18058 #define RCC_PLL1DIVR_PLL1Q_4 (0x010UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00100000… 18059 #define RCC_PLL1DIVR_PLL1Q_5 (0x020UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00200020… 18060 #define RCC_PLL1DIVR_PLL1Q_6 (0x040UL << RCC_PLL1DIVR_PLL1Q_Pos) /!< 0x00400000…

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