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Searched refs:RCC_PLL1DIVR_PLL1P (Results 1 – 25 of 35) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc.c886 …(((tmpreg2 & RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) != (RCC_OscInitStruct->PLL1.PLLP - 1u)… in HAL_RCC_OscConfig()
1395 pllp = ((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + 1U; in HAL_RCC_GetPLL1PFreq()
1507 RCC_OscInitStruct->PLL1.PLLP = (((regvalue & RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + 1U); in HAL_RCC_GetOscConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c957 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1P) >> \ in HAL_RCC_OscConfig()
1470 pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + 1U) ; in HAL_RCC_GetSysClockFreq()
1609 …pOscInitStruct->PLL.PLLP = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) +… in HAL_RCC_GetOscConfig()
Dstm32h5xx_hal_rcc_ex.c2834RCC_PLL1DIVR_PLL1P) >> \ in HAL_RCCEx_GetPLL1ClockFreq()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_rcc.h2334 …MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P, ((PLLN - 1UL) << RCC_PLL1DIVR_P… in LL_RCC_PLL1_ConfigDomain_PLL1P()
2416 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1P, (PLL1P - 1UL) << RCC_PLL1DIVR_PLL1P_Pos); in LL_RCC_PLL1_SetP()
2427 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + 1UL); in LL_RCC_PLL1_GetP()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dsystem_stm32h5xx.c373 pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1P) >>RCC_PLL1DIVR_PLL1P_Pos) + 1U ) ; in SystemCoreClockUpdate()
Dsystem_stm32h5xx_s.c387 pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1P) >>RCC_PLL1DIVR_PLL1P_Pos) + 1U ) ; in SystemCoreClockUpdate()
Dstm32h503xx.h8571 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
Dstm32h523xx.h12747 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
Dstm32h562xx.h13427 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
Dstm32h533xx.h13266 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
Dstm32h573xx.h16030 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1278 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_PLL1P) >> \ in HAL_RCC_OscConfig()
1945 …pRCC_OscInitStruct->PLL.PLLP = (uint32_t)(((reg2val & RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Po… in HAL_RCC_GetOscConfig()
Dstm32u5xx_hal_rcc_ex.c1538RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + \ in HAL_RCCEx_GetPLL1ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4330 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P, \ in LL_RCC_PLL1_ConfigDomain_SYS()
4391 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1P, (PLL1P - 1UL) << RCC_PLL1DIVR_PLL1P_Pos); in LL_RCC_PLL1_SetP()
4402 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + 1UL); in LL_RCC_PLL1_GetP()
Dstm32h5xx_hal_rcc.h4581 … ((((__PLL1P__) - 1U ) << RCC_PLL1DIVR_PLL1P_Pos) & RCC_PLL1DIVR_PLL1P) | \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h3922 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_SAI()
4017 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1P, (PLL1P - 1UL) << RCC_PLL1DIVR_PLL1P_Pos); in LL_RCC_PLL1_SetP()
4029 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + 1UL); in LL_RCC_PLL1_GetP()
Dstm32u5xx_hal_rcc.h4456 MODIFY_REG(RCC->PLL1DIVR ,(RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P | RCC_PLL1DIVR_PLL1Q |\
4459 RCC_PLL1DIVR_PLL1P) | \
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6043 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
Dstm32wba52xx.h9817 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
Dstm32wba54xx.h10089 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
Dstm32wba5mxx.h10107 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
Dstm32wba55xx.h10107 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14587 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk /*!< PLL1P[6:0]… macro
Dstm32u535xx.h14074 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk /*!< PLL1P[6:0]… macro
Dstm32u575xx.h15482 #define RCC_PLL1DIVR_PLL1P RCC_PLL1DIVR_PLL1P_Msk /*!< PLL1P[6:0]… macro

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