Searched refs:RCC_PLL1DIVR1_DIVR_Pos (Results 1 – 7 of 7) sorted by relevance
1491 pllr = ((RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVR) >> RCC_PLL1DIVR1_DIVR_Pos) + 1U; in HAL_RCC_GetPLL1RFreq()1732 RCC_OscInitStruct->PLL1.PLLR = (((regvalue & RCC_PLL1DIVR1_DIVR) >> RCC_PLL1DIVR1_DIVR_Pos) + 1U); in HAL_RCC_GetOscConfig()2042 ((pPLLInit->PLLR - 1U) << RCC_PLL1DIVR1_DIVR_Pos))); in RCC_PLL_Config()
4031 …return (uint32_t)((READ_BIT(RCC->PLL1DIVR1, RCC_PLL1DIVR1_DIVR) >> RCC_PLL1DIVR1_DIVR_Pos) + 1UL); in LL_RCC_PLL1_GetR()4106 MODIFY_REG(RCC->PLL1DIVR1, RCC_PLL1DIVR1_DIVR, (R - 1UL) << RCC_PLL1DIVR1_DIVR_Pos); in LL_RCC_PLL1_SetR()
3948 … ((((__PLL1R__) - 1U) << RCC_PLL1DIVR1_DIVR_Pos) & RCC_PLL1DIVR1_DIVR))); \
14889 #define RCC_PLL1DIVR1_DIVR_Pos (24U) macro14890 #define RCC_PLL1DIVR1_DIVR_Msk (0x7FUL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x7F000000 */14892 #define RCC_PLL1DIVR1_DIVR_0 (0x001UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x01000000 */14893 #define RCC_PLL1DIVR1_DIVR_1 (0x002UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x02000000 */14894 #define RCC_PLL1DIVR1_DIVR_2 (0x004UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x04000000 */14895 #define RCC_PLL1DIVR1_DIVR_3 (0x008UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x08000000 */14896 #define RCC_PLL1DIVR1_DIVR_4 (0x010UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x10000000 */14897 #define RCC_PLL1DIVR1_DIVR_5 (0x020UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x20000000 */14898 #define RCC_PLL1DIVR1_DIVR_6 (0x040UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x40000000 */
15923 #define RCC_PLL1DIVR1_DIVR_Pos (24U) macro15924 #define RCC_PLL1DIVR1_DIVR_Msk (0x7FUL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x7F000000 */15926 #define RCC_PLL1DIVR1_DIVR_0 (0x001UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x01000000 */15927 #define RCC_PLL1DIVR1_DIVR_1 (0x002UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x02000000 */15928 #define RCC_PLL1DIVR1_DIVR_2 (0x004UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x04000000 */15929 #define RCC_PLL1DIVR1_DIVR_3 (0x008UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x08000000 */15930 #define RCC_PLL1DIVR1_DIVR_4 (0x010UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x10000000 */15931 #define RCC_PLL1DIVR1_DIVR_5 (0x020UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x20000000 */15932 #define RCC_PLL1DIVR1_DIVR_6 (0x040UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x40000000 */
15521 #define RCC_PLL1DIVR1_DIVR_Pos (24U) macro15522 #define RCC_PLL1DIVR1_DIVR_Msk (0x7FUL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x7F000000 */15524 #define RCC_PLL1DIVR1_DIVR_0 (0x001UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x01000000 */15525 #define RCC_PLL1DIVR1_DIVR_1 (0x002UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x02000000 */15526 #define RCC_PLL1DIVR1_DIVR_2 (0x004UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x04000000 */15527 #define RCC_PLL1DIVR1_DIVR_3 (0x008UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x08000000 */15528 #define RCC_PLL1DIVR1_DIVR_4 (0x010UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x10000000 */15529 #define RCC_PLL1DIVR1_DIVR_5 (0x020UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x20000000 */15530 #define RCC_PLL1DIVR1_DIVR_6 (0x040UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x40000000 */
15289 #define RCC_PLL1DIVR1_DIVR_Pos (24U) macro15290 #define RCC_PLL1DIVR1_DIVR_Msk (0x7FUL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x7F000000 */15292 #define RCC_PLL1DIVR1_DIVR_0 (0x001UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x01000000 */15293 #define RCC_PLL1DIVR1_DIVR_1 (0x002UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x02000000 */15294 #define RCC_PLL1DIVR1_DIVR_2 (0x004UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x04000000 */15295 #define RCC_PLL1DIVR1_DIVR_3 (0x008UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x08000000 */15296 #define RCC_PLL1DIVR1_DIVR_4 (0x010UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x10000000 */15297 #define RCC_PLL1DIVR1_DIVR_5 (0x020UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x20000000 */15298 #define RCC_PLL1DIVR1_DIVR_6 (0x040UL << RCC_PLL1DIVR1_DIVR_Pos) /*!< 0x40000000 */
