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Searched refs:RCC_PLL1DIVR1_DIVN (Results 1 – 8 of 8) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dsystem_stm32h7rsxx.c235 …HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn… in SystemCoreClockUpdate()
239 …CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn… in SystemCoreClockUpdate()
245 …)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn… in SystemCoreClockUpdate()
Dstm32h7r3xx.h14856 #define RCC_PLL1DIVR1_DIVN RCC_PLL1DIVR1_DIVN_Msk /*!< DIVN1[8:0] bits: … macro
Dstm32h7s7xx.h15890 #define RCC_PLL1DIVR1_DIVN RCC_PLL1DIVR1_DIVN_Msk /*!< DIVN1[8:0] bits: … macro
Dstm32h7s3xx.h15488 #define RCC_PLL1DIVR1_DIVN RCC_PLL1DIVR1_DIVN_Msk /*!< DIVN1[8:0] bits: … macro
Dstm32h7r7xx.h15256 #define RCC_PLL1DIVR1_DIVN RCC_PLL1DIVR1_DIVN_Msk /*!< DIVN1[8:0] bits: … macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_rcc.c1307 …)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (fracn1 /… in HAL_RCC_GetSysClockFreq()
1317 …CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (fracn1 /… in HAL_RCC_GetSysClockFreq()
1321 …HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (fracn1 /… in HAL_RCC_GetSysClockFreq()
1325 …CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (fracn1 /… in HAL_RCC_GetSysClockFreq()
1731 RCC_OscInitStruct->PLL1.PLLN = ((regvalue & RCC_PLL1DIVR1_DIVN) + 1U); in HAL_RCC_GetOscConfig()
2109 plln = (tmpreg2 & RCC_PLL1DIVR1_DIVN) + 1U; in RCC_PLL1_GetVCOOutputFreq()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_rcc.h3766 MODIFY_REG(RCC->PLL1DIVR1, RCC_PLL1DIVR1_DIVP | RCC_PLL1DIVR1_DIVN, in LL_RCC_PLL1_ConfigDomain_SYS()
3991 …return (uint32_t)((READ_BIT(RCC->PLL1DIVR1, RCC_PLL1DIVR1_DIVN) >> RCC_PLL1DIVR1_DIVN_Pos) + 1UL); in LL_RCC_PLL1_GetN()
4062 MODIFY_REG(RCC->PLL1DIVR1, RCC_PLL1DIVR1_DIVN, (N - 1UL) << RCC_PLL1DIVR1_DIVN_Pos); in LL_RCC_PLL1_SetN()
Dstm32h7rsxx_hal_rcc.h3945 WRITE_REG(RCC->PLL1DIVR1, ((((__PLL1N__) - 1U) & RCC_PLL1DIVR1_DIVN) | \