Searched refs:RCC_PLL1CFGR_PLL1RCLKPRESTEP (Results 1 – 7 of 7) sorted by relevance
634 #define LL_RCC_PLL1RCLK_3_STEP_DIV RCC_PLL1CFGR_PLL1RCLKPRESTEP /*!< PLL1RCLK 3-step division…2266 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1RCLKPRESTEP, Step); in LL_RCC_PLL1_SetPLL1RCLKDivisionStep()2278 return (uint32_t)(READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1RCLKPRESTEP)); in LL_RCC_PLL1_GetPLL1RCLKDivisionStep()
1035 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1RCLKPRESTEP, RCC_PLL1CFGR_PLL1RCLKPRE); in HAL_RCC_ClockConfig()
6023 #define RCC_PLL1CFGR_PLL1RCLKPRESTEP RCC_PLL1CFGR_PLL1RCLKPRESTEP_Msk macro
9797 #define RCC_PLL1CFGR_PLL1RCLKPRESTEP RCC_PLL1CFGR_PLL1RCLKPRESTEP_Msk macro
10069 #define RCC_PLL1CFGR_PLL1RCLKPRESTEP RCC_PLL1CFGR_PLL1RCLKPRESTEP_Msk macro
10087 #define RCC_PLL1CFGR_PLL1RCLKPRESTEP RCC_PLL1CFGR_PLL1RCLKPRESTEP_Msk macro
