Searched refs:RCC_PLL1CFGR_PLL1FRACEN_Pos (Results 1 – 25 of 31) sorted by relevance
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312 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
335 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
14483 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro14484 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
13970 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro13971 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
15378 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro15379 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
15940 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro15941 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
16406 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro16407 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
16968 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro16969 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
347 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
361 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos); in SystemCoreClockUpdate()
8495 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro8496 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
12635 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro12636 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
13315 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro13316 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
13154 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro13155 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
15918 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro15919 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
15399 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro15400 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
1433 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); in HAL_RCC_GetSysClockFreq()
2795 pll1fracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); in HAL_RCCEx_GetPLL1ClockFreq()
1774 pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); in HAL_RCC_GetSysClockFreq()
1510 pll1fracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); in HAL_RCCEx_GetPLL1ClockFreq()
6000 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro6001 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
9774 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro9775 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
10046 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro10047 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
10064 #define RCC_PLL1CFGR_PLL1FRACEN_Pos (4U) macro10065 #define RCC_PLL1CFGR_PLL1FRACEN_Msk (0x1UL << RCC_PLL1CFGR_PLL1FRACEN_Pos) /*!< 0x00000010…
