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Searched refs:RCC_PLL1CFGR3_PLL1PDIV1 (Results 1 – 10 of 10) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c1673 …pRCC_OscInitStruct->PLL1.PLLP1 = ((cfgr_value & RCC_PLL1CFGR3_PLL1PDIV1) >> RCC_PLL1CFGR3_PLL1PDIV… in HAL_RCC_GetOscConfig()
2072 MODIFY_REG(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1PDIV1 | RCC_PLL1CFGR3_PLL1PDIV2), \ in RCC_PLL_Config()
2230 else if ((*p_rcc_pll_cfgr3_reg & (RCC_PLL1CFGR3_PLL1PDIV1 | RCC_PLL1CFGR3_PLL1PDIV2)) != \ in RCC_PLL_IsNewConfig()
Dstm32n6xx_hal_rcc_ex.c3190 MODIFY_REG(*p_rcc_pll_cfgr3_reg, (RCC_PLL1CFGR3_PLL1PDIV1 | RCC_PLL1CFGR3_PLL1PDIV2), \ in HAL_RCCEx_PLLSSCGConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dsystem_stm32n6xx_s.c315 pllp1 = (pllcfgr & RCC_PLL1CFGR3_PLL1PDIV1) >> RCC_PLL1CFGR3_PLL1PDIV1_Pos; in SystemCoreClockUpdate()
Dsystem_stm32n6xx_fsbl.c372 pllp1 = (pllcfgr & RCC_PLL1CFGR3_PLL1PDIV1) >> RCC_PLL1CFGR3_PLL1PDIV1_Pos; in SystemCoreClockUpdate()
Dstm32n645xx.h25397 #define RCC_PLL1CFGR3_PLL1PDIV1 RCC_PLL1CFGR3_PLL1PDIV1_Msk /*!< PLL1 VCO … macro
Dstm32n657xx.h26546 #define RCC_PLL1CFGR3_PLL1PDIV1 RCC_PLL1CFGR3_PLL1PDIV1_Msk /*!< PLL1 VCO … macro
Dstm32n655xx.h26304 #define RCC_PLL1CFGR3_PLL1PDIV1 RCC_PLL1CFGR3_PLL1PDIV1_Msk /*!< PLL1 VCO … macro
Dstm32n647xx.h25639 #define RCC_PLL1CFGR3_PLL1PDIV1 RCC_PLL1CFGR3_PLL1PDIV1_Msk /*!< PLL1 VCO … macro
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_hal_rcc.h3641 MODIFY_REG(RCC->PLL1CFGR3, (RCC_PLL1CFGR3_PLL1PDIV1 | RCC_PLL1CFGR3_PLL1PDIV2), \
3642 ((((__PLLP1__) << RCC_PLL1CFGR3_PLL1PDIV1_Pos) & RCC_PLL1CFGR3_PLL1PDIV1) | \
Dstm32n6xx_ll_rcc.h5217 MODIFY_REG(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIV1, P1 << RCC_PLL1CFGR3_PLL1PDIV1_Pos); in LL_RCC_PLL1_SetP1()
5227 …return (uint32_t)(READ_BIT(RCC->PLL1CFGR3, RCC_PLL1CFGR3_PLL1PDIV1) >> RCC_PLL1CFGR3_PLL1PDIV1_Pos… in LL_RCC_PLL1_GetP1()