Searched refs:RCC_PLL1CFGR1_PLL1SEL (Results 1 – 10 of 10) sorted by relevance
1667 pRCC_OscInitStruct->PLL1.PLLSource = (cfgr_value & RCC_PLL1CFGR1_PLL1SEL); in HAL_RCC_GetOscConfig()2069 …MODIFY_REG(*p_rcc_pll_cfgr1_reg, (RCC_PLL1CFGR1_PLL1SEL | RCC_PLL1CFGR1_PLL1DIVM | RCC_PLL1CFGR1_P… in RCC_PLL_Config()2130 MODIFY_REG(*p_rcc_pll_cfgr1_reg, (RCC_PLL1CFGR1_PLL1BYP | RCC_PLL1CFGR1_PLL1SEL), \ in RCC_PLL_Config()2219 …if ((*p_rcc_pll_cfgr1_reg & (RCC_PLL1CFGR1_PLL1SEL | RCC_PLL1CFGR1_PLL1DIVM | RCC_PLL1CFGR1_PLL1DI… in RCC_PLL_IsNewConfig()
3187 …MODIFY_REG(*p_rcc_pll_cfgr1_reg, (RCC_PLL1CFGR1_PLL1SEL | RCC_PLL1CFGR1_PLL1DIVM | RCC_PLL1CFGR1_P… in HAL_RCCEx_PLLSSCGConfig()
307 pllsource = pllcfgr & RCC_PLL1CFGR1_PLL1SEL; in SystemCoreClockUpdate()
364 pllsource = pllcfgr & RCC_PLL1CFGR1_PLL1SEL; in SystemCoreClockUpdate()
25360 #define RCC_PLL1CFGR1_PLL1SEL RCC_PLL1CFGR1_PLL1SEL_Msk /*!< PLL1 sour… macro
26509 #define RCC_PLL1CFGR1_PLL1SEL RCC_PLL1CFGR1_PLL1SEL_Msk /*!< PLL1 sour… macro
26267 #define RCC_PLL1CFGR1_PLL1SEL RCC_PLL1CFGR1_PLL1SEL_Msk /*!< PLL1 sour… macro
25602 #define RCC_PLL1CFGR1_PLL1SEL RCC_PLL1CFGR1_PLL1SEL_Msk /*!< PLL1 sour… macro
4967 MODIFY_REG(RCC->PLL1CFGR1, RCC_PLL1CFGR1_PLL1SEL, PLLSource); in LL_RCC_PLL1_SetSource()4981 return (uint32_t)(READ_BIT(RCC->PLL1CFGR1, RCC_PLL1CFGR1_PLL1SEL)); in LL_RCC_PLL1_GetSource()
3638 …MODIFY_REG(RCC->PLL1CFGR1, (RCC_PLL1CFGR1_PLL1SEL | RCC_PLL1CFGR1_PLL1BYP | RCC_PLL1CFGR1_PLL1DIVM…