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Searched refs:RCC_PLL1CFGR1_PLL1DIVN_Pos (Results 1 – 10 of 10) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c1669 …C_OscInitStruct->PLL1.PLLN = ((cfgr_value & RCC_PLL1CFGR1_PLL1DIVN) >> RCC_PLL1CFGR1_PLL1DIVN_Pos); in HAL_RCC_GetOscConfig()
2071 | (pPLLInit->PLLN << RCC_PLL1CFGR1_PLL1DIVN_Pos))); in RCC_PLL_Config()
2221 | (pPLLInit->PLLN << RCC_PLL1CFGR1_PLL1DIVN_Pos))) in RCC_PLL_IsNewConfig()
Dstm32n6xx_hal_rcc_ex.c3189 | (pPLLInit->PLLN << RCC_PLL1CFGR1_PLL1DIVN_Pos))); in HAL_RCCEx_PLLSSCGConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dsystem_stm32n6xx_s.c312 plln = (pllcfgr & RCC_PLL1CFGR1_PLL1DIVN) >> RCC_PLL1CFGR1_PLL1DIVN_Pos; in SystemCoreClockUpdate()
Dsystem_stm32n6xx_fsbl.c369 plln = (pllcfgr & RCC_PLL1CFGR1_PLL1DIVN) >> RCC_PLL1CFGR1_PLL1DIVN_Pos; in SystemCoreClockUpdate()
Dstm32n645xx.h25349 #define RCC_PLL1CFGR1_PLL1DIVN_Pos (8U) macro
25350 #define RCC_PLL1CFGR1_PLL1DIVN_Msk (0xFFFUL << RCC_PLL1CFGR1_PLL1DIVN_Pos) /*!< 0x000F…
Dstm32n657xx.h26498 #define RCC_PLL1CFGR1_PLL1DIVN_Pos (8U) macro
26499 #define RCC_PLL1CFGR1_PLL1DIVN_Msk (0xFFFUL << RCC_PLL1CFGR1_PLL1DIVN_Pos) /*!< 0x000F…
Dstm32n655xx.h26256 #define RCC_PLL1CFGR1_PLL1DIVN_Pos (8U) macro
26257 #define RCC_PLL1CFGR1_PLL1DIVN_Msk (0xFFFUL << RCC_PLL1CFGR1_PLL1DIVN_Pos) /*!< 0x000F…
Dstm32n647xx.h25591 #define RCC_PLL1CFGR1_PLL1DIVN_Pos (8U) macro
25592 #define RCC_PLL1CFGR1_PLL1DIVN_Msk (0xFFFUL << RCC_PLL1CFGR1_PLL1DIVN_Pos) /*!< 0x000F…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h5174 MODIFY_REG(RCC->PLL1CFGR1, RCC_PLL1CFGR1_PLL1DIVN, N << RCC_PLL1CFGR1_PLL1DIVN_Pos); in LL_RCC_PLL1_SetN()
5185 …return (uint32_t)((READ_BIT(RCC->PLL1CFGR1, RCC_PLL1CFGR1_PLL1DIVN) >> RCC_PLL1CFGR1_PLL1DIVN_Pos)… in LL_RCC_PLL1_GetN()
Dstm32n6xx_hal_rcc.h3639 … | ( (__PLLM__) << RCC_PLL1CFGR1_PLL1DIVM_Pos) | (((__PLLN__) << RCC_PLL1CFGR1_PLL1DIVN_Pos)))); \