Searched refs:RCC_IC5CFGR_IC5INT_Pos (Results 1 – 6 of 6) sorted by relevance
234 … ((PeriphClkInit->ICSelection[RCC_IC5].ClockDivider - 1U) << RCC_IC5CFGR_IC5INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()507 … ((PeriphClkInit->ICSelection[RCC_IC5].ClockDivider - 1U) << RCC_IC5CFGR_IC5INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()552 … ((PeriphClkInit->ICSelection[RCC_IC5].ClockDivider - 1U) << RCC_IC5CFGR_IC5INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()
6741 MODIFY_REG(RCC->IC5CFGR, RCC_IC5CFGR_IC5INT, (Divider - 1UL) << RCC_IC5CFGR_IC5INT_Pos); in LL_RCC_IC5_SetDivider()6751 return ((READ_BIT(RCC->IC5CFGR, RCC_IC5CFGR_IC5INT) >> RCC_IC5CFGR_IC5INT_Pos) + 1UL); in LL_RCC_IC5_GetDivider()
25605 #define RCC_IC5CFGR_IC5INT_Pos (16U) macro25606 #define RCC_IC5CFGR_IC5INT_Msk (0xFFUL << RCC_IC5CFGR_IC5INT_Pos) /*!< 0x00FF00…
26754 #define RCC_IC5CFGR_IC5INT_Pos (16U) macro26755 #define RCC_IC5CFGR_IC5INT_Msk (0xFFUL << RCC_IC5CFGR_IC5INT_Pos) /*!< 0x00FF00…
26512 #define RCC_IC5CFGR_IC5INT_Pos (16U) macro26513 #define RCC_IC5CFGR_IC5INT_Msk (0xFFUL << RCC_IC5CFGR_IC5INT_Pos) /*!< 0x00FF00…
25847 #define RCC_IC5CFGR_IC5INT_Pos (16U) macro25848 #define RCC_IC5CFGR_IC5INT_Msk (0xFFUL << RCC_IC5CFGR_IC5INT_Pos) /*!< 0x00FF00…
