Searched refs:RCC_IC3CFGR_IC3INT_Pos (Results 1 – 6 of 6) sorted by relevance
314 … ((PeriphClkInit->ICSelection[RCC_IC3].ClockDivider - 1U) << RCC_IC3CFGR_IC3INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()359 … ((PeriphClkInit->ICSelection[RCC_IC3].ClockDivider - 1U) << RCC_IC3CFGR_IC3INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()404 … ((PeriphClkInit->ICSelection[RCC_IC3].ClockDivider - 1U) << RCC_IC3CFGR_IC3INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()449 … ((PeriphClkInit->ICSelection[RCC_IC3].ClockDivider - 1U) << RCC_IC3CFGR_IC3INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()
6581 MODIFY_REG(RCC->IC3CFGR, RCC_IC3CFGR_IC3INT, (Divider - 1UL) << RCC_IC3CFGR_IC3INT_Pos); in LL_RCC_IC3_SetDivider()6591 return ((READ_BIT(RCC->IC3CFGR, RCC_IC3CFGR_IC3INT) >> RCC_IC3CFGR_IC3INT_Pos) + 1UL); in LL_RCC_IC3_GetDivider()
25585 #define RCC_IC3CFGR_IC3INT_Pos (16U) macro25586 #define RCC_IC3CFGR_IC3INT_Msk (0xFFUL << RCC_IC3CFGR_IC3INT_Pos) /*!< 0x00FF00…
26734 #define RCC_IC3CFGR_IC3INT_Pos (16U) macro26735 #define RCC_IC3CFGR_IC3INT_Msk (0xFFUL << RCC_IC3CFGR_IC3INT_Pos) /*!< 0x00FF00…
26492 #define RCC_IC3CFGR_IC3INT_Pos (16U) macro26493 #define RCC_IC3CFGR_IC3INT_Msk (0xFFUL << RCC_IC3CFGR_IC3INT_Pos) /*!< 0x00FF00…
25827 #define RCC_IC3CFGR_IC3INT_Pos (16U) macro25828 #define RCC_IC3CFGR_IC3INT_Msk (0xFFUL << RCC_IC3CFGR_IC3INT_Pos) /*!< 0x00FF00…
