Searched refs:RCC_IC20 (Results 1 – 2 of 2) sorted by relevance
280 assert_param(IS_RCC_ICCLKSOURCE(PeriphClkInit->ICSelection[RCC_IC20].ClockSelection)); in HAL_RCCEx_PeriphCLKConfig()281 assert_param(IS_RCC_ICCLKDIVIDER(PeriphClkInit->ICSelection[RCC_IC20].ClockDivider)); in HAL_RCCEx_PeriphCLKConfig()285 PeriphClkInit->ICSelection[RCC_IC20].ClockSelection | \ in HAL_RCCEx_PeriphCLKConfig()286 … ((PeriphClkInit->ICSelection[RCC_IC20].ClockDivider - 1U) << RCC_IC20CFGR_IC20INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()1397 assert_param(IS_RCC_ICCLKSOURCE(PeriphClkInit->ICSelection[RCC_IC20].ClockSelection)); in HAL_RCCEx_PeriphCLKConfig()1398 assert_param(IS_RCC_ICCLKDIVIDER(PeriphClkInit->ICSelection[RCC_IC20].ClockDivider)); in HAL_RCCEx_PeriphCLKConfig()1402 PeriphClkInit->ICSelection[RCC_IC20].ClockSelection | \ in HAL_RCCEx_PeriphCLKConfig()1403 … ((PeriphClkInit->ICSelection[RCC_IC20].ClockDivider - 1U) << RCC_IC20CFGR_IC20INT_Pos)); in HAL_RCCEx_PeriphCLKConfig()
848 #define RCC_IC20 19U /*!< IC20 source is PLL4 output by default */ macro