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Searched refs:RCC_IC1CFGR_IC1SEL_0 (Results 1 – 7 of 7) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dsystem_stm32n6xx_s.c319 case RCC_IC1CFGR_IC1SEL_0: /* PLL2 selected at IC1 clock source */ in SystemCoreClockUpdate()
Dsystem_stm32n6xx_fsbl.c376 case RCC_IC1CFGR_IC1SEL_0: /* PLL2 selected at IC1 clock source */ in SystemCoreClockUpdate()
Dstm32n645xx.h25571 #define RCC_IC1CFGR_IC1SEL_0 (0x1UL << RCC_IC1CFGR_IC1SEL_Pos) /*!< 0x1000000… macro
Dstm32n657xx.h26720 #define RCC_IC1CFGR_IC1SEL_0 (0x1UL << RCC_IC1CFGR_IC1SEL_Pos) /*!< 0x1000000… macro
Dstm32n655xx.h26478 #define RCC_IC1CFGR_IC1SEL_0 (0x1UL << RCC_IC1CFGR_IC1SEL_Pos) /*!< 0x1000000… macro
Dstm32n647xx.h25813 #define RCC_IC1CFGR_IC1SEL_0 (0x1UL << RCC_IC1CFGR_IC1SEL_Pos) /*!< 0x1000000… macro
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h1472 #define LL_RCC_ICCLKSOURCE_PLL2 RCC_IC1CFGR_IC1SEL_0
1474 #define LL_RCC_ICCLKSOURCE_PLL4 (RCC_IC1CFGR_IC1SEL_1 | RCC_IC1CFGR_IC1SEL_0)