Searched refs:RCC_HSI_DIV4 (Results 1 – 8 of 8) sorted by relevance
127 ((__HSI__) == RCC_HSI_DIV4) || ((__HSI__) == RCC_HSI_OUTEN) || \128 … ((__HSI__) == (RCC_HSI_OUTEN|RCC_HSI_ON)) || ((__HSI__) == (RCC_HSI_OUTEN|RCC_HSI_DIV4)))131 ((__HSI__) == RCC_HSI_DIV4))356 #define RCC_HSI_DIV4 (RCC_CR_HSIDIVEN | RCC_CR_HSION) /*!< HSI_DIV4 clock activ… macro
105 ((__DIV__) == RCC_HSI_DIV4) || ((__DIV__) == RCC_HSI_DIV8) || \361 #define RCC_HSI_DIV4 RCC_CR_HSIDIV_1 /*!< HSI clock… macro
95 ((__DIV__) == RCC_HSI_DIV4) || ((__DIV__) == RCC_HSI_DIV8) || \421 #define RCC_HSI_DIV4 RCC_CR_HSIDIV_1 /*!< HSI … macro
240 #define RCC_HSI_DIV4 LL_RCC_HSI_DIV_4 /*!< HSI clock is divided by 4 */ macro4427 ((__HSI__) == RCC_HSI_DIV4) || ((__HSI__) == RCC_HSI_DIV8))
329 #define RCC_HSI_DIV4 RCC_HSICFGR_HSIDIV_1 /* Division by 4, ck_hsi(_ker) = 16 MHz… macro333 ((DIV) == RCC_HSI_DIV4) || ((DIV) == RCC_HSI_DIV8) )
214 #define RCC_HSI_DIV4 RCC_CR_HSIDIV_1 /*!< HSI clock is div… macro4949 ((__DIV__) == RCC_HSI_DIV4) || ((__DIV__) == RCC_HSI_DIV8))
228 #define RCC_HSI_DIV4 RCC_CR_HSIDIV_1 /*!< HSI clock activation with divider 4… macro4632 ((__HSIDIV__) == RCC_HSI_DIV4) || ((__HSIDIV__) == RCC_HSI_DIV8))
208 #define RCC_HSI_DIV4 (RCC_CR_HSIDIV_4 | RCC_CR_HSION) /*!< HSI_DIV4 clock activ… macro8060 ((HSI) == RCC_HSI_DIV4) || ((HSI) == RCC_HSI_DIV8))
