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Searched refs:RCC_HSI_DIV2 (Results 1 – 7 of 7) sorted by relevance

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h104 #define IS_RCC_HSIDIV(__DIV__) (((__DIV__) == RCC_HSI_DIV1) || ((__DIV__) == RCC_HSI_DIV2) || \
360 #define RCC_HSI_DIV2 RCC_CR_HSIDIV_0 /*!< HSI clock… macro
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h94 #define IS_RCC_HSIDIV(__DIV__) (((__DIV__) == RCC_HSI_DIV1) || ((__DIV__) == RCC_HSI_DIV2) || \
420 #define RCC_HSI_DIV2 RCC_CR_HSIDIV_0 /*!< HSI … macro
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_hal_rcc.h239 #define RCC_HSI_DIV2 LL_RCC_HSI_DIV_2 /*!< HSI clock is divided by 2 */ macro
4426 #define IS_RCC_HSI_DIV(__HSI__) (((__HSI__) == RCC_HSI_DIV1) || ((__HSI__) == RCC_HSI_DIV2) || \
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_rcc.h328 #define RCC_HSI_DIV2 RCC_HSICFGR_HSIDIV_0 /* Division by 2, ck_hsi(_ker) = 32 MHz… macro
332 #define IS_RCC_HSIDIV(DIV) (((DIV) == RCC_HSI_DIV1) || ((DIV) == RCC_HSI_DIV2) || \
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h213 #define RCC_HSI_DIV2 RCC_CR_HSIDIV_0 /*!< HSI clock is div… macro
4948 #define IS_RCC_HSIDIV(__DIV__) (((__DIV__) == RCC_HSI_DIV1) || ((__DIV__) == RCC_HSI_DIV2) || \
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_rcc.h227 #define RCC_HSI_DIV2 RCC_CR_HSIDIV_0 /*!< HSI clock activation with divider 2… macro
4631 #define IS_RCC_HSIDIV(__HSIDIV__) (((__HSIDIV__) == RCC_HSI_DIV1) || ((__HSIDIV__) == RCC_HSI_DIV2)…
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h207 #define RCC_HSI_DIV2 (RCC_CR_HSIDIV_2 | RCC_CR_HSION) /*!< HSI_DIV2 clock activ… macro
8059 ((HSI) == RCC_HSI_DIV1) || ((HSI) == RCC_HSI_DIV2) || \