Searched refs:RCC_HSI_DIV1 (Results 1 – 7 of 7) sorted by relevance
104 #define IS_RCC_HSIDIV(__DIV__) (((__DIV__) == RCC_HSI_DIV1) || ((__DIV__) == RCC_HSI_DIV2) || \359 #define RCC_HSI_DIV1 0x00000000U /*!< HSI clock… macro
94 #define IS_RCC_HSIDIV(__DIV__) (((__DIV__) == RCC_HSI_DIV1) || ((__DIV__) == RCC_HSI_DIV2) || \419 #define RCC_HSI_DIV1 0x00000000U /*!< HSI … macro
238 #define RCC_HSI_DIV1 LL_RCC_HSI_DIV_1 /*!< HSI clock is not divided */ macro4426 #define IS_RCC_HSI_DIV(__HSI__) (((__HSI__) == RCC_HSI_DIV1) || ((__HSI__) == RCC_HSI_DIV2) || \
327 #define RCC_HSI_DIV1 0U /* Division by 1, ck_hsi(_ker) = 64 MHz… macro332 #define IS_RCC_HSIDIV(DIV) (((DIV) == RCC_HSI_DIV1) || ((DIV) == RCC_HSI_DIV2) || \
212 #define RCC_HSI_DIV1 0x00000000U /*!< HSI clock is not… macro4948 #define IS_RCC_HSIDIV(__DIV__) (((__DIV__) == RCC_HSI_DIV1) || ((__DIV__) == RCC_HSI_DIV2) || \
226 #define RCC_HSI_DIV1 0U /*!< HSI clock activation with divider 1… macro4631 #define IS_RCC_HSIDIV(__HSIDIV__) (((__HSIDIV__) == RCC_HSI_DIV1) || ((__HSIDIV__) == RCC_HSI_DIV2)…
206 #define RCC_HSI_DIV1 (RCC_CR_HSIDIV_1 | RCC_CR_HSION) /*!< HSI_DIV1 clock activ… macro8059 ((HSI) == RCC_HSI_DIV1) || ((HSI) == RCC_HSI_DIV2) || \