Searched refs:RCC_ECSCR1_HSETRIM_Pos (Results 1 – 8 of 8) sorted by relevance
1228 MODIFY_REG(RCC->ECSCR1, RCC_ECSCR1_HSETRIM, Trimming << RCC_ECSCR1_HSETRIM_Pos); in HAL_RCCEx_HSESetTrimming()1237 return ((RCC->ECSCR1 & RCC_ECSCR1_HSETRIM) >> RCC_ECSCR1_HSETRIM_Pos); in HAL_RCCEx_HSEGetTrimming()
901 MODIFY_REG(RCC->ECSCR1, RCC_ECSCR1_HSETRIM, Value << RCC_ECSCR1_HSETRIM_Pos); in LL_RCC_HSE_SetClockTrimming()911 return (uint32_t)(READ_BIT(RCC->ECSCR1, RCC_ECSCR1_HSETRIM) >> RCC_ECSCR1_HSETRIM_Pos); in LL_RCC_HSE_GetClockTrimming()
982 …C_HSETRIM(__TRIM__) ((__TRIM__) <= (RCC_ECSCR1_HSETRIM >> RCC_ECSCR1_HSETRIM_Pos))
6590 #define RCC_ECSCR1_HSETRIM_Pos (16U) macro6591 #define RCC_ECSCR1_HSETRIM_Msk (0x3FUL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x003F000…6593 #define RCC_ECSCR1_HSETRIM_0 (0x1UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0001000…6594 #define RCC_ECSCR1_HSETRIM_1 (0x2UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0002000…6595 #define RCC_ECSCR1_HSETRIM_2 (0x4UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0004000…6596 #define RCC_ECSCR1_HSETRIM_3 (0x8UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0008000…6597 #define RCC_ECSCR1_HSETRIM_4 (0x10UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0010000…6598 #define RCC_ECSCR1_HSETRIM_5 (0x20UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0020000…
10492 #define RCC_ECSCR1_HSETRIM_Pos (16U) macro10493 #define RCC_ECSCR1_HSETRIM_Msk (0x3FUL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x003F000…10495 #define RCC_ECSCR1_HSETRIM_0 (0x1UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0001000…10496 #define RCC_ECSCR1_HSETRIM_1 (0x2UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0002000…10497 #define RCC_ECSCR1_HSETRIM_2 (0x4UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0004000…10498 #define RCC_ECSCR1_HSETRIM_3 (0x8UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0008000…10499 #define RCC_ECSCR1_HSETRIM_4 (0x10UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0010000…10500 #define RCC_ECSCR1_HSETRIM_5 (0x20UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0020000…
10886 #define RCC_ECSCR1_HSETRIM_Pos (16U) macro10887 #define RCC_ECSCR1_HSETRIM_Msk (0x3FUL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x003F000…10889 #define RCC_ECSCR1_HSETRIM_0 (0x1UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0001000…10890 #define RCC_ECSCR1_HSETRIM_1 (0x2UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0002000…10891 #define RCC_ECSCR1_HSETRIM_2 (0x4UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0004000…10892 #define RCC_ECSCR1_HSETRIM_3 (0x8UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0008000…10893 #define RCC_ECSCR1_HSETRIM_4 (0x10UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0010000…10894 #define RCC_ECSCR1_HSETRIM_5 (0x20UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0020000…
10904 #define RCC_ECSCR1_HSETRIM_Pos (16U) macro10905 #define RCC_ECSCR1_HSETRIM_Msk (0x3FUL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x003F000…10907 #define RCC_ECSCR1_HSETRIM_0 (0x1UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0001000…10908 #define RCC_ECSCR1_HSETRIM_1 (0x2UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0002000…10909 #define RCC_ECSCR1_HSETRIM_2 (0x4UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0004000…10910 #define RCC_ECSCR1_HSETRIM_3 (0x8UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0008000…10911 #define RCC_ECSCR1_HSETRIM_4 (0x10UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0010000…10912 #define RCC_ECSCR1_HSETRIM_5 (0x20UL << RCC_ECSCR1_HSETRIM_Pos) /*!< 0x0020000…
