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Searched refs:RCC_DCKCFGR_I2S1SRC_Pos (Results 1 – 7 of 7) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f412cx.h9147 #define RCC_DCKCFGR_I2S1SRC_Pos (25U) macro
9148 #define RCC_DCKCFGR_I2S1SRC_Msk (0x3UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x06000000 */
9150 #define RCC_DCKCFGR_I2S1SRC_0 (0x1UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x02000000 */
9151 #define RCC_DCKCFGR_I2S1SRC_1 (0x2UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x04000000 */
Dstm32f423xx.h10565 #define RCC_DCKCFGR_I2S1SRC_Pos (25U) macro
10566 #define RCC_DCKCFGR_I2S1SRC_Msk (0x3UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x06000000 */
10568 #define RCC_DCKCFGR_I2S1SRC_0 (0x1UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x02000000 */
10569 #define RCC_DCKCFGR_I2S1SRC_1 (0x2UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x04000000 */
Dstm32f412zx.h10145 #define RCC_DCKCFGR_I2S1SRC_Pos (25U) macro
10146 #define RCC_DCKCFGR_I2S1SRC_Msk (0x3UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x06000000 */
10148 #define RCC_DCKCFGR_I2S1SRC_0 (0x1UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x02000000 */
10149 #define RCC_DCKCFGR_I2S1SRC_1 (0x2UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x04000000 */
Dstm32f412rx.h10112 #define RCC_DCKCFGR_I2S1SRC_Pos (25U) macro
10113 #define RCC_DCKCFGR_I2S1SRC_Msk (0x3UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x06000000 */
10115 #define RCC_DCKCFGR_I2S1SRC_0 (0x1UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x02000000 */
10116 #define RCC_DCKCFGR_I2S1SRC_1 (0x2UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x04000000 */
Dstm32f412vx.h10123 #define RCC_DCKCFGR_I2S1SRC_Pos (25U) macro
10124 #define RCC_DCKCFGR_I2S1SRC_Msk (0x3UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x06000000 */
10126 #define RCC_DCKCFGR_I2S1SRC_0 (0x1UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x02000000 */
10127 #define RCC_DCKCFGR_I2S1SRC_1 (0x2UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x04000000 */
Dstm32f413xx.h10520 #define RCC_DCKCFGR_I2S1SRC_Pos (25U) macro
10521 #define RCC_DCKCFGR_I2S1SRC_Msk (0x3UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x06000000 */
10523 #define RCC_DCKCFGR_I2S1SRC_0 (0x1UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x02000000 */
10524 #define RCC_DCKCFGR_I2S1SRC_1 (0x2UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x04000000 */
Dstm32f446xx.h11109 #define RCC_DCKCFGR_I2S1SRC_Pos (25U) macro
11110 #define RCC_DCKCFGR_I2S1SRC_Msk (0x3UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x06000000 */
11112 #define RCC_DCKCFGR_I2S1SRC_0 (0x1UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x02000000 */
11113 #define RCC_DCKCFGR_I2S1SRC_1 (0x2UL << RCC_DCKCFGR_I2S1SRC_Pos) /*!< 0x04000000 */