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Searched refs:RCC_DCKCFGR2_UART5SEL_Pos (Results 1 – 14 of 14) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h10182 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
10183 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
10185 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
10186 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f722xx.h10160 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
10161 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
10163 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
10164 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f730xx.h10405 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
10406 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
10408 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
10409 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f733xx.h10405 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
10406 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
10408 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
10409 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f732xx.h10383 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
10384 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
10386 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
10387 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f750xx.h11707 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
11708 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
11710 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
11711 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f745xx.h11066 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
11067 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
11069 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
11070 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f756xx.h11707 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
11708 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
11710 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
11711 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f746xx.h11414 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
11415 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
11417 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
11418 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f765xx.h11635 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
11636 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
11638 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
11639 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f777xx.h12322 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
12323 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
12325 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
12326 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f767xx.h12029 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
12030 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
12032 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
12033 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f779xx.h12414 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
12415 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
12417 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
12418 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */
Dstm32f769xx.h12121 #define RCC_DCKCFGR2_UART5SEL_Pos (8U) macro
12122 #define RCC_DCKCFGR2_UART5SEL_Msk (0x3UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000300 */
12124 #define RCC_DCKCFGR2_UART5SEL_0 (0x1UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000100 */
12125 #define RCC_DCKCFGR2_UART5SEL_1 (0x2UL << RCC_DCKCFGR2_UART5SEL_Pos) /*!< 0x00000200 */