Searched refs:RCC_DCKCFGR2_I2C3SEL_Pos (Results 1 – 14 of 14) sorted by relevance
10212 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro10213 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */10215 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */10216 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
10190 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro10191 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */10193 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */10194 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
10435 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro10436 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */10438 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */10439 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
10413 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro10414 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */10416 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */10417 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
11737 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro11738 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */11740 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */11741 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
11096 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro11097 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */11099 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */11100 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
11444 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro11445 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */11447 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */11448 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
11665 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro11666 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */11668 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */11669 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
12352 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro12353 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */12355 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */12356 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
12059 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro12060 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */12062 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */12063 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
12444 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro12445 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */12447 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */12448 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
12151 #define RCC_DCKCFGR2_I2C3SEL_Pos (20U) macro12152 #define RCC_DCKCFGR2_I2C3SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00300000 */12154 #define RCC_DCKCFGR2_I2C3SEL_0 (0x1UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00100000 */12155 #define RCC_DCKCFGR2_I2C3SEL_1 (0x2UL << RCC_DCKCFGR2_I2C3SEL_Pos) /*!< 0x00200000 */
