Searched refs:RCC_DCKCFGR2_I2C1SEL_Pos (Results 1 – 14 of 14) sorted by relevance
10202 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro10203 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */10205 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */10206 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
10180 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro10181 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */10183 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */10184 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
10425 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro10426 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */10428 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */10429 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
10403 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro10404 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */10406 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */10407 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
11727 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro11728 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */11730 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */11731 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
11086 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro11087 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */11089 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */11090 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
11434 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro11435 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */11437 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */11438 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
11655 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro11656 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */11658 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */11659 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
12342 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro12343 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */12345 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */12346 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
12049 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro12050 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */12052 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */12053 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
12434 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro12435 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */12437 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */12438 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
12141 #define RCC_DCKCFGR2_I2C1SEL_Pos (16U) macro12142 #define RCC_DCKCFGR2_I2C1SEL_Msk (0x3UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00030000 */12144 #define RCC_DCKCFGR2_I2C1SEL_0 (0x1UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00010000 */12145 #define RCC_DCKCFGR2_I2C1SEL_1 (0x2UL << RCC_DCKCFGR2_I2C1SEL_Pos) /*!< 0x00020000 */
