Home
last modified time | relevance | path

Searched refs:RCC_DCKCFGR1_SAI2SEL_Pos (Results 1 – 14 of 14) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h10151 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
10152 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
10154 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
10155 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f722xx.h10129 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
10130 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
10132 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
10133 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f730xx.h10374 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
10375 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
10377 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
10378 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f733xx.h10374 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
10375 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
10377 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
10378 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f732xx.h10352 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
10353 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
10355 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
10356 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f750xx.h11676 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
11677 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
11679 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
11680 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f745xx.h11035 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
11036 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
11038 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
11039 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f756xx.h11676 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
11677 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
11679 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
11680 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f746xx.h11383 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
11384 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
11386 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
11387 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f765xx.h11598 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
11599 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
11601 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
11602 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f777xx.h12285 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
12286 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
12288 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
12289 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f767xx.h11992 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
11993 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
11995 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
11996 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f779xx.h12377 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
12378 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
12380 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
12381 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */
Dstm32f769xx.h12084 #define RCC_DCKCFGR1_SAI2SEL_Pos (22U) macro
12085 #define RCC_DCKCFGR1_SAI2SEL_Msk (0x3UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00C00000 */
12087 #define RCC_DCKCFGR1_SAI2SEL_0 (0x1UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00400000 */
12088 #define RCC_DCKCFGR1_SAI2SEL_1 (0x2UL << RCC_DCKCFGR1_SAI2SEL_Pos) /*!< 0x00800000 */