Searched refs:RCC_DCKCFGR1_SAI1SEL_0 (Results 1 – 17 of 17) sorted by relevance
1423 case RCC_DCKCFGR1_SAI1SEL_0: /* PLLI2S is the clock source for SAI1 */ in HAL_RCCEx_GetPeriphCLKFreq()
421 …C_SAI1_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR1_SAI1SEL | (RCC_DCKCFGR1_SAI1SEL_0 >> 16U)) …
324 #define RCC_SAI1CLKSOURCE_PLLI2S RCC_DCKCFGR1_SAI1SEL_0
10148 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
10126 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
10371 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
10349 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
11673 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
11032 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
11380 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
11591 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
12278 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
11985 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
12370 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
12077 #define RCC_DCKCFGR1_SAI1SEL_0 (0x1UL << RCC_DCKCFGR1_SAI1SEL_Pos) /*!< 0x00100000 */ macro
