Searched refs:RCC_CSR_LSEDRV_Pos (Results 1 – 19 of 19) sorted by relevance
3950 #define RCC_CSR_LSEDRV_Pos (11U) macro3951 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3953 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3954 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
3647 #define RCC_CSR_LSEDRV_Pos (11U) macro3648 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3650 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3651 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
3676 #define RCC_CSR_LSEDRV_Pos (11U) macro3677 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3679 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3680 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
3712 #define RCC_CSR_LSEDRV_Pos (11U) macro3713 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3715 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3716 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
3849 #define RCC_CSR_LSEDRV_Pos (11U) macro3850 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3852 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3853 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
3813 #define RCC_CSR_LSEDRV_Pos (11U) macro3814 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3816 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3817 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
3941 #define RCC_CSR_LSEDRV_Pos (11U) macro3942 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3944 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3945 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
3603 #define RCC_CSR_LSEDRV_Pos (11U) macro3604 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3606 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3607 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
3636 #define RCC_CSR_LSEDRV_Pos (11U) macro3637 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */3639 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */3640 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4193 #define RCC_CSR_LSEDRV_Pos (11U) macro4194 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4196 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4197 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4056 #define RCC_CSR_LSEDRV_Pos (11U) macro4057 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4059 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4060 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4304 #define RCC_CSR_LSEDRV_Pos (11U) macro4305 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4307 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4308 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4441 #define RCC_CSR_LSEDRV_Pos (11U) macro4442 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4444 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4445 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4457 #define RCC_CSR_LSEDRV_Pos (11U) macro4458 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4460 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4461 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4523 #define RCC_CSR_LSEDRV_Pos (11U) macro4524 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4526 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4527 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4674 #define RCC_CSR_LSEDRV_Pos (11U) macro4675 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4677 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4678 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4811 #define RCC_CSR_LSEDRV_Pos (11U) macro4812 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4814 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4815 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4592 #define RCC_CSR_LSEDRV_Pos (11U) macro4593 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4595 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4596 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
4660 #define RCC_CSR_LSEDRV_Pos (11U) macro4661 #define RCC_CSR_LSEDRV_Msk (0x3UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001800 */4663 #define RCC_CSR_LSEDRV_0 (0x1UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00000800 */4664 #define RCC_CSR_LSEDRV_1 (0x2UL << RCC_CSR_LSEDRV_Pos) /*!< 0x00001000 */
