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Searched refs:RCC_CFGR_TIMPRE_Pos (Results 1 – 25 of 26) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h12807 #define RCC_CFGR_TIMPRE_Pos (15U) macro
12808 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h7b0xx.h13251 #define RCC_CFGR_TIMPRE_Pos (15U) macro
13252 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h7b0xxq.h13263 #define RCC_CFGR_TIMPRE_Pos (15U) macro
13264 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h7a3xxq.h12819 #define RCC_CFGR_TIMPRE_Pos (15U) macro
12820 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h7b3xx.h13258 #define RCC_CFGR_TIMPRE_Pos (15U) macro
13259 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h7b3xxq.h13270 #define RCC_CFGR_TIMPRE_Pos (15U) macro
13271 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h730xxq.h15118 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15119 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h733xx.h15106 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15107 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h725xx.h14667 #define RCC_CFGR_TIMPRE_Pos (15U) macro
14668 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h730xx.h15106 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15107 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h735xx.h15118 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15119 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h742xx.h13992 #define RCC_CFGR_TIMPRE_Pos (15U) macro
13993 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h723xx.h14655 #define RCC_CFGR_TIMPRE_Pos (15U) macro
14656 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h750xx.h14885 #define RCC_CFGR_TIMPRE_Pos (15U) macro
14886 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h753xx.h14891 #define RCC_CFGR_TIMPRE_Pos (15U) macro
14892 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h745xx.h15198 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15199 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h745xg.h15198 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15199 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h743xx.h14622 #define RCC_CFGR_TIMPRE_Pos (15U) macro
14623 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h755xx.h15467 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15468 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h757xx.h18624 #define RCC_CFGR_TIMPRE_Pos (15U) macro
18625 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
Dstm32h747xg.h18355 #define RCC_CFGR_TIMPRE_Pos (15U) macro
18356 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos)
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h14641 #define RCC_CFGR_TIMPRE_Pos (15U) macro
14642 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos) /*!< 0x00008000 */
Dstm32h7s7xx.h15675 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15676 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos) /*!< 0x00008000 */
Dstm32h7s3xx.h15273 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15274 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos) /*!< 0x00008000 */
Dstm32h7r7xx.h15041 #define RCC_CFGR_TIMPRE_Pos (15U) macro
15042 #define RCC_CFGR_TIMPRE_Msk (0x1UL << RCC_CFGR_TIMPRE_Pos) /*!< 0x00008000 */

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