Searched refs:RCC_CFGR_SW_1 (Results 1 – 25 of 237) sorted by relevance
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207 #define LL_RCC_SYS_CLKSOURCE_HSIUSB48 RCC_CFGR_SW_1 /*!< HSIUSB48 selecti…209 #define LL_RCC_SYS_CLKSOURCE_LSI (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< LSI selection us…
408 #define RCC_SYSCLKSOURCE_HSIUSB48 RCC_CFGR_SW_1 /*!< HSIUSB48 selection us…410 #define RCC_SYSCLKSOURCE_LSI (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< LSI selection as syst…
209 case RCC_CFGR_SW_1: /* HSI48 used as system clock */ in SystemCoreClockUpdate()
244 #define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_1 /*!< HSE selection as system clock */245 #define LL_RCC_SYS_CLKSOURCE_PLL (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< PLL selection as…
256 #define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_1 /*!< HSE selection as …257 #define LL_RCC_SYS_CLKSOURCE_PLL (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< PLL selection as …
408 #define RCC_SYSCLKSOURCE_HSE RCC_CFGR_SW_1 /*!< HSE selection as sys…409 #define RCC_SYSCLKSOURCE_PLLCLK (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< PLL selection as sys…
213 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_1 /*!< PLL selection as…214 #define LL_RCC_SYS_CLKSOURCE_LSI (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< LSI selection us…
580 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_1 /*!< PLL selection as syst…581 #define RCC_SYSCLKSOURCE_LSI (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< LSI selection as syst…
281 #define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_1 /*!< HSE selection as …282 #define LL_RCC_SYS_CLKSOURCE_PLL (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< PLL selection as …
274 #define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_1275 #define LL_RCC_SYS_CLKSOURCE_PLL1 (RCC_CFGR_SW_1 | RCC_CFGR_SW_0)
340 #define RCC_SYSCLKSOURCE_HSE RCC_CFGR_SW_1 /*!< HSE selection as system clock */341 #define RCC_SYSCLKSOURCE_PLLCLK (RCC_CFGR_SW_1 | RCC_CFGR_SW_0) /*!< PLL1 selection as syste…
204 #define RCC_SYSCLKSOURCE_PLLRCLK ((uint32_t)(RCC_CFGR_SW_0 | RCC_CFGR_SW_1))
253 #define LL_RCC_SYS_CLKSOURCE_HSE RCC_CFGR_SW_1 /*!< HSE selection as system cloc…
426 #define RCC_SYSCLKSOURCE_HSE RCC_CFGR_SW_1 /*!< HSE selection as system clock */
816 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
831 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
891 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
2789 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
2819 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
2843 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
3377 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
3080 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
3088 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
3177 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro
3305 #define RCC_CFGR_SW_1 (0x2UL << RCC_CFGR_SW_Pos) /*!< 0x00000002 */ macro