Searched refs:RCC_CFGR2_PREDIV1SRC (Results 1 – 6 of 6) sorted by relevance
403 #if defined(RCC_CFGR2_PREDIV1SRC)404 #define LL_RCC_PLLSOURCE_PLL2 (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1SRC << 4U) /*!< PLL2…424 #if defined(RCC_CFGR2_PREDIV1SRC)425 …RCE_PLL2_DIV_1 (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV1 | RCC_CFGR2_PREDIV1SRC << 4U) /…426 …RCE_PLL2_DIV_2 (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV2 | RCC_CFGR2_PREDIV1SRC << 4U) /…427 …RCE_PLL2_DIV_3 (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV3 | RCC_CFGR2_PREDIV1SRC << 4U) /…428 …RCE_PLL2_DIV_4 (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV4 | RCC_CFGR2_PREDIV1SRC << 4U) /…429 …RCE_PLL2_DIV_5 (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV5 | RCC_CFGR2_PREDIV1SRC << 4U) /…430 …RCE_PLL2_DIV_6 (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV6 | RCC_CFGR2_PREDIV1SRC << 4U) /…431 …RCE_PLL2_DIV_7 (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV7 | RCC_CFGR2_PREDIV1SRC << 4U) /…[all …]
603 ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2)) in HAL_RCC_OscConfig()662 CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC); in HAL_RCC_OscConfig()718 #if defined(RCC_CFGR2_PREDIV1SRC) in HAL_RCC_OscConfig()1082 #if defined(RCC_CFGR2_PREDIV1SRC) in HAL_RCC_GetSysClockFreq()1096 #if defined(RCC_CFGR2_PREDIV1SRC) in HAL_RCC_GetSysClockFreq()1120 #if defined(RCC_CFGR2_PREDIV1SRC) in HAL_RCC_GetSysClockFreq()1122 if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) in HAL_RCC_GetSysClockFreq()1219 #if defined(RCC_CFGR2_PREDIV1SRC) in HAL_RCC_GetOscConfig()1221 RCC_OscInitStruct->Prediv1Source = READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC); in HAL_RCC_GetOscConfig()
430 if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) in HAL_RCCEx_GetPeriphCLKFreq()745 ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2)) in HAL_RCCEx_EnablePLL2()816 ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2)) in HAL_RCCEx_DisablePLL2()
300 prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; in SystemCoreClockUpdate()
2047 #define RCC_CFGR2_PREDIV1SRC RCC_CFGR2_PREDIV1SRC_Msk /*!< PREDIV1 entry c… macro
2139 #define RCC_CFGR2_PREDIV1SRC RCC_CFGR2_PREDIV1SRC_Msk /*!< PREDIV1 entry c… macro
