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Searched refs:RCC_CFGR2_PPRE1 (Results 1 – 25 of 35) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c1088 if ((pClkInitStruct->APB1CLKDivider) > (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1091 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, pClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1228 if ((pClkInitStruct->APB1CLKDivider) < (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1231 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, pClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1514 …return (HAL_RCC_GetHCLKFreq() >> ((APBPrescTable[(RCC->CFGR2 & RCC_CFGR2_PPRE1) >> RCC_CFGR2_PPRE1… in HAL_RCC_GetPCLK1Freq()
1644 pClkInitStruct->APB1CLKDivider = (uint32_t)(regval & RCC_CFGR2_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1408 if ((pRCC_ClkInitStruct->APB1CLKDivider) > (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1411 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, pRCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1573 if ((pRCC_ClkInitStruct->APB1CLKDivider) < (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1576 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, pRCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1827 …return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR2 & RCC_CFGR2_PPRE1) >> RCC_CFGR2_PPRE1_P… in HAL_RCC_GetPCLK1Freq()
1978 pRCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c900 if ((pRCC_ClkInitStruct->APB1CLKDivider) > (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
902 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, (pRCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1122 if ((pRCC_ClkInitStruct->APB1CLKDivider) < (RCC->CFGR2 & RCC_CFGR2_PPRE1)) in HAL_RCC_ClockConfig()
1124 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, (pRCC_ClkInitStruct->APB1CLKDivider)); in HAL_RCC_ClockConfig()
1804 pRCC_ClkInitStruct->APB1CLKDivider = (cfgr_value & RCC_CFGR2_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc.c1124 tmpreg1 &= ~RCC_CFGR2_PPRE1; in HAL_RCC_ClockConfig()
1319 …return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR2 & RCC_CFGR2_PPRE1) >> RCC_CFGR2_PPRE1_P… in HAL_RCC_GetPCLK1Freq()
1539 RCC_ClkInitStruct->APB1CLKDivider = (tmpreg1 & RCC_CFGR2_PPRE1); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_rcc.h773 …RESCALER__) ((__HCLKFREQ__) >> (APBPrescTable[((__APB1PRESCALER__) & RCC_CFGR2_PPRE1) >> RCC_CFGR…
1504 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, Prescaler); in LL_RCC_SetAPB1Prescaler()
1608 return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PPRE1)); in LL_RCC_GetAPB1Prescaler()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h1466 …((__HCLKFREQ__) >> (APBPrescTable[((__APB1PRESCALER__) & RCC_CFGR2_PPRE1) >> RCC_CFGR2_PPRE1_Pos]…
2232 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, Prescaler); in LL_RCC_SetAPB1Prescaler()
2311 return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PPRE1)); in LL_RCC_GetAPB1Prescaler()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h1342 … RCC_CFGR2_PPRE1) >> RCC_CFGR2_PPRE1_Pos]))
2616 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, Prescaler); in LL_RCC_SetAPB1Prescaler()
2713 return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PPRE1)); in LL_RCC_GetAPB1Prescaler()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h1546 … RCC_CFGR2_PPRE1) >> RCC_CFGR2_PPRE1_Pos))
2431 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, Prescaler); in LL_RCC_SetAPB1Prescaler()
2449 return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PPRE1)); in LL_RCC_GetAPB1Prescaler()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h5970 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32wba52xx.h9744 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32wba54xx.h10016 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32wba5mxx.h10034 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32wba55xx.h10034 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8447 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32h523xx.h12584 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32h562xx.h13264 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32h533xx.h13103 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32h573xx.h15867 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32h563xx.h15348 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14428 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32u535xx.h13915 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32u575xx.h15323 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32u585xx.h15885 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32u595xx.h16351 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro
Dstm32u5a5xx.h16913 #define RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_Msk /*!< PPRE1[2:0]… macro

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