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Searched refs:RCC_CFGR2_HPRE_Pos (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dsystem_stm32u5xx.c345 tmp = AHBPrescTable[((RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos)]; in SystemCoreClockUpdate()
Dsystem_stm32u5xx_s.c368 tmp = AHBPrescTable[((RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos)]; in SystemCoreClockUpdate()
Dstm32u545xx.h14418 #define RCC_CFGR2_HPRE_Pos (0U) macro
14419 #define RCC_CFGR2_HPRE_Msk (0xFUL << RCC_CFGR2_HPRE_Pos) /*!< 0x0000000F…
14421 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
14422 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
14423 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
14424 #define RCC_CFGR2_HPRE_3 (0x8UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000008…
Dstm32u535xx.h13905 #define RCC_CFGR2_HPRE_Pos (0U) macro
13906 #define RCC_CFGR2_HPRE_Msk (0xFUL << RCC_CFGR2_HPRE_Pos) /*!< 0x0000000F…
13908 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
13909 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
13910 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
13911 #define RCC_CFGR2_HPRE_3 (0x8UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000008…
Dstm32u575xx.h15313 #define RCC_CFGR2_HPRE_Pos (0U) macro
15314 #define RCC_CFGR2_HPRE_Msk (0xFUL << RCC_CFGR2_HPRE_Pos) /*!< 0x0000000F…
15316 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
15317 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
15318 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
15319 #define RCC_CFGR2_HPRE_3 (0x8UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000008…
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc.c1168 … = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos]; in HAL_RCC_ClockConfig()
1306 … = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos]; in HAL_RCC_GetHCLKFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dsystem_stm32h5xx.c384 tmp = AHBPrescTable[((RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos)]; in SystemCoreClockUpdate()
Dsystem_stm32h5xx_s.c398 tmp = AHBPrescTable[((RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos)]; in SystemCoreClockUpdate()
Dstm32h503xx.h8436 #define RCC_CFGR2_HPRE_Pos (0U) macro
8437 #define RCC_CFGR2_HPRE_Msk (0xFUL << RCC_CFGR2_HPRE_Pos) /*!< 0x0000000F…
8439 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
8440 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
8441 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
8442 #define RCC_CFGR2_HPRE_3 (0x8UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000008…
Dstm32h523xx.h12573 #define RCC_CFGR2_HPRE_Pos (0U) macro
12574 #define RCC_CFGR2_HPRE_Msk (0xFUL << RCC_CFGR2_HPRE_Pos) /*!< 0x0000000F…
12576 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
12577 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
12578 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
12579 #define RCC_CFGR2_HPRE_3 (0x8UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000008…
Dstm32h562xx.h13253 #define RCC_CFGR2_HPRE_Pos (0U) macro
13254 #define RCC_CFGR2_HPRE_Msk (0xFUL << RCC_CFGR2_HPRE_Pos) /*!< 0x0000000F…
13256 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
13257 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
13258 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
13259 #define RCC_CFGR2_HPRE_3 (0x8UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000008…
Dstm32h533xx.h13092 #define RCC_CFGR2_HPRE_Pos (0U) macro
13093 #define RCC_CFGR2_HPRE_Msk (0xFUL << RCC_CFGR2_HPRE_Pos) /*!< 0x0000000F…
13095 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
13096 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
13097 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
13098 #define RCC_CFGR2_HPRE_3 (0x8UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000008…
Dstm32h573xx.h15856 #define RCC_CFGR2_HPRE_Pos (0U) macro
15857 #define RCC_CFGR2_HPRE_Msk (0xFUL << RCC_CFGR2_HPRE_Pos) /*!< 0x0000000F…
15859 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
15860 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
15861 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
15862 #define RCC_CFGR2_HPRE_3 (0x8UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000008…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c1256 … = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos]; in HAL_RCC_ClockConfig()
1500 >> RCC_CFGR2_HPRE_Pos] & 0x1FU); in HAL_RCC_GetHCLKFreq()
Dstm32h5xx_hal.c154 … = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos]; in HAL_Init()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1601 … = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos]; in HAL_RCC_ClockConfig()
1814 … = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos]; in HAL_RCC_GetHCLKFreq()
Dstm32u5xx_hal.c151 … = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos]; in HAL_Init()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_rcc.h760 …_) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos])
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h5962 #define RCC_CFGR2_HPRE_Pos (0U) macro
5963 #define RCC_CFGR2_HPRE_Msk (0x7UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000007…
5965 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
5966 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
5967 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
Dstm32wba52xx.h9736 #define RCC_CFGR2_HPRE_Pos (0U) macro
9737 #define RCC_CFGR2_HPRE_Msk (0x7UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000007…
9739 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
9740 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
9741 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
Dstm32wba54xx.h10008 #define RCC_CFGR2_HPRE_Pos (0U) macro
10009 #define RCC_CFGR2_HPRE_Msk (0x7UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000007…
10011 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
10012 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
10013 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
Dstm32wba5mxx.h10026 #define RCC_CFGR2_HPRE_Pos (0U) macro
10027 #define RCC_CFGR2_HPRE_Msk (0x7UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000007…
10029 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
10030 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
10031 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
Dstm32wba55xx.h10026 #define RCC_CFGR2_HPRE_Pos (0U) macro
10027 #define RCC_CFGR2_HPRE_Msk (0x7UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000007…
10029 #define RCC_CFGR2_HPRE_0 (0x1UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000001…
10030 #define RCC_CFGR2_HPRE_1 (0x2UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000002…
10031 #define RCC_CFGR2_HPRE_2 (0x4UL << RCC_CFGR2_HPRE_Pos) /*!< 0x00000004…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h1452 ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos])
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h1327 >> RCC_CFGR2_HPRE_Pos])

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