Searched refs:RCC_CDCFGR2_CDPPRE1_DIV1 (Results 1 – 8 of 8) sorted by relevance
318 #define LL_RCC_APB1_DIV_1 RCC_CDCFGR2_CDPPRE1_DIV1
433 #define RCC_APB1_DIV1 RCC_CDCFGR2_CDPPRE1_DIV1
12943 #define RCC_CDCFGR2_CDPPRE1_DIV1 (0U) /*!< APB1 clock not divided */ macro
13387 #define RCC_CDCFGR2_CDPPRE1_DIV1 (0U) /*!< APB1 clock not divided */ macro
13399 #define RCC_CDCFGR2_CDPPRE1_DIV1 (0U) /*!< APB1 clock not divided */ macro
12955 #define RCC_CDCFGR2_CDPPRE1_DIV1 (0U) /*!< APB1 clock not divided */ macro
13394 #define RCC_CDCFGR2_CDPPRE1_DIV1 (0U) /*!< APB1 clock not divided */ macro
13406 #define RCC_CDCFGR2_CDPPRE1_DIV1 (0U) /*!< APB1 clock not divided */ macro
