Searched refs:RCC_CCIPR5_RNGSEL_0 (Results 1 – 8 of 8) sorted by relevance
923 #define RCC_RNGCLKSOURCE_PLL1Q RCC_CCIPR5_RNGSEL_0925 #define RCC_RNGCLKSOURCE_LSI (RCC_CCIPR5_RNGSEL_0 | RCC_CCIPR5_RNGSEL_1)
908 #define LL_RCC_RNG_CLKSOURCE_PLL1Q RCC_CCIPR5_RNGSEL_0 /*!< PLL1 Q clock used as RNG cl…
9317 #define RCC_CCIPR5_RNGSEL_0 (0x1UL << RCC_CCIPR5_RNGSEL_Pos) /*!< 0x00000010 */ macro
13788 #define RCC_CCIPR5_RNGSEL_0 (0x1UL << RCC_CCIPR5_RNGSEL_Pos) /*!< 0x00000010 */ macro
14762 #define RCC_CCIPR5_RNGSEL_0 (0x1UL << RCC_CCIPR5_RNGSEL_Pos) /*!< 0x00000010 */ macro
14337 #define RCC_CCIPR5_RNGSEL_0 (0x1UL << RCC_CCIPR5_RNGSEL_Pos) /*!< 0x00000010 */ macro
17407 #define RCC_CCIPR5_RNGSEL_0 (0x1UL << RCC_CCIPR5_RNGSEL_Pos) /*!< 0x00000010 */ macro
16858 #define RCC_CCIPR5_RNGSEL_0 (0x1UL << RCC_CCIPR5_RNGSEL_Pos) /*!< 0x00000010 */ macro
