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Searched refs:RCC_CCIPR4_I3C2SEL_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h728 …CE_PCLK3 LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos, 0x0000000…
730 …CE_PLL3R LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos, RCC_CCIPR…
732 …CE_PLL2R LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos, RCC_CCIPR…
734 …CE_HSI LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos, RCC_CCIPR…
735 …CE_NONE LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos, RCC_CCIPR…
1072 …URCE LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos, 0x0000000…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h763 …_CLKSOURCE_PCLK1 LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos, 0U)
764 …3C2_CLKSOURCE_CLKP LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos,\
766 …3C2_CLKSOURCE_IC10 LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos,\
768 …3C2_CLKSOURCE_IC15 LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos,\
770 …3C2_CLKSOURCE_MSI LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos,\
772 …3C2_CLKSOURCE_HSI LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos,\
1306 …_CLKSOURCE LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I3C2SEL, RCC_CCIPR4_I3C2SEL_Pos, 0U)
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h9295 #define RCC_CCIPR4_I3C2SEL_Pos (26U) macro
9296 #define RCC_CCIPR4_I3C2SEL_Msk (0x3UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x0C000000 */
9298 #define RCC_CCIPR4_I3C2SEL_0 (0x1UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x04000000 */
9299 #define RCC_CCIPR4_I3C2SEL_1 (0x2UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x08000000 */
Dstm32h523xx.h13766 #define RCC_CCIPR4_I3C2SEL_Pos (26U) macro
13767 #define RCC_CCIPR4_I3C2SEL_Msk (0x3UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x0C000000 */
13769 #define RCC_CCIPR4_I3C2SEL_0 (0x1UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x04000000 */
13770 #define RCC_CCIPR4_I3C2SEL_1 (0x2UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x08000000 */
Dstm32h533xx.h14315 #define RCC_CCIPR4_I3C2SEL_Pos (26U) macro
14316 #define RCC_CCIPR4_I3C2SEL_Msk (0x3UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x0C000000 */
14318 #define RCC_CCIPR4_I3C2SEL_0 (0x1UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x04000000 */
14319 #define RCC_CCIPR4_I3C2SEL_1 (0x2UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< 0x08000000 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h25988 #define RCC_CCIPR4_I3C2SEL_Pos (20U) macro
25989 #define RCC_CCIPR4_I3C2SEL_Msk (0x7UL << RCC_CCIPR4_I3C2SEL_Pos) …
25991 #define RCC_CCIPR4_I3C2SEL_0 (0x1UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
25992 #define RCC_CCIPR4_I3C2SEL_1 (0x2UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
25993 #define RCC_CCIPR4_I3C2SEL_2 (0x4UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
Dstm32n657xx.h27137 #define RCC_CCIPR4_I3C2SEL_Pos (20U) macro
27138 #define RCC_CCIPR4_I3C2SEL_Msk (0x7UL << RCC_CCIPR4_I3C2SEL_Pos) …
27140 #define RCC_CCIPR4_I3C2SEL_0 (0x1UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
27141 #define RCC_CCIPR4_I3C2SEL_1 (0x2UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
27142 #define RCC_CCIPR4_I3C2SEL_2 (0x4UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
Dstm32n655xx.h26895 #define RCC_CCIPR4_I3C2SEL_Pos (20U) macro
26896 #define RCC_CCIPR4_I3C2SEL_Msk (0x7UL << RCC_CCIPR4_I3C2SEL_Pos) …
26898 #define RCC_CCIPR4_I3C2SEL_0 (0x1UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
26899 #define RCC_CCIPR4_I3C2SEL_1 (0x2UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
26900 #define RCC_CCIPR4_I3C2SEL_2 (0x4UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
Dstm32n647xx.h26230 #define RCC_CCIPR4_I3C2SEL_Pos (20U) macro
26231 #define RCC_CCIPR4_I3C2SEL_Msk (0x7UL << RCC_CCIPR4_I3C2SEL_Pos) …
26233 #define RCC_CCIPR4_I3C2SEL_0 (0x1UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
26234 #define RCC_CCIPR4_I3C2SEL_1 (0x2UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …
26235 #define RCC_CCIPR4_I3C2SEL_2 (0x4UL << RCC_CCIPR4_I3C2SEL_Pos) /*!< …