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Searched refs:RCC_CCIPR4_I2C1SEL_Pos (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h680 …CE_PCLK1 LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos, 0x0000000…
682 …CE_PLL3R LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos, RCC_CCIPR…
684 …CE_PLL2R LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos, RCC_CCIPR…
686 …CE_HSI LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos, RCC_CCIPR…
687 …CE_CSI LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos, RCC_CCIPR…
1055 …URCE LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos, 0x0000000…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h697 …_CLKSOURCE_PCLK1 LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos, 0U)
698 …2C1_CLKSOURCE_CLKP LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos,\
700 …2C1_CLKSOURCE_IC10 LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos,\
702 …2C1_CLKSOURCE_IC15 LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos,\
704 …2C1_CLKSOURCE_MSI LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos,\
706 …2C1_CLKSOURCE_HSI LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos,\
1294 …_CLKSOURCE LL_CLKSOURCE(CCIPR4_OFFSET, RCC_CCIPR4_I2C1SEL, RCC_CCIPR4_I2C1SEL_Pos, 0U)
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h9277 #define RCC_CCIPR4_I2C1SEL_Pos (16U) macro
9278 #define RCC_CCIPR4_I2C1SEL_Msk (0x3UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00030000 */
9280 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00010000 */
9281 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00020000 */
Dstm32h523xx.h13742 #define RCC_CCIPR4_I2C1SEL_Pos (16U) macro
13743 #define RCC_CCIPR4_I2C1SEL_Msk (0x3UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00030000 */
13745 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00010000 */
13746 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00020000 */
Dstm32h562xx.h14716 #define RCC_CCIPR4_I2C1SEL_Pos (16U) macro
14717 #define RCC_CCIPR4_I2C1SEL_Msk (0x3UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00030000 */
14719 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00010000 */
14720 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00020000 */
Dstm32h533xx.h14291 #define RCC_CCIPR4_I2C1SEL_Pos (16U) macro
14292 #define RCC_CCIPR4_I2C1SEL_Msk (0x3UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00030000 */
14294 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00010000 */
14295 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00020000 */
Dstm32h573xx.h17361 #define RCC_CCIPR4_I2C1SEL_Pos (16U) macro
17362 #define RCC_CCIPR4_I2C1SEL_Msk (0x3UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00030000 */
17364 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00010000 */
17365 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00020000 */
Dstm32h563xx.h16812 #define RCC_CCIPR4_I2C1SEL_Pos (16U) macro
16813 #define RCC_CCIPR4_I2C1SEL_Msk (0x3UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00030000 */
16815 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00010000 */
16816 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) /*!< 0x00020000 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h25958 #define RCC_CCIPR4_I2C1SEL_Pos (0U) macro
25959 #define RCC_CCIPR4_I2C1SEL_Msk (0x7UL << RCC_CCIPR4_I2C1SEL_Pos) …
25961 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) …
25962 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) …
25963 #define RCC_CCIPR4_I2C1SEL_2 (0x4UL << RCC_CCIPR4_I2C1SEL_Pos) …
Dstm32n657xx.h27107 #define RCC_CCIPR4_I2C1SEL_Pos (0U) macro
27108 #define RCC_CCIPR4_I2C1SEL_Msk (0x7UL << RCC_CCIPR4_I2C1SEL_Pos) …
27110 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) …
27111 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) …
27112 #define RCC_CCIPR4_I2C1SEL_2 (0x4UL << RCC_CCIPR4_I2C1SEL_Pos) …
Dstm32n655xx.h26865 #define RCC_CCIPR4_I2C1SEL_Pos (0U) macro
26866 #define RCC_CCIPR4_I2C1SEL_Msk (0x7UL << RCC_CCIPR4_I2C1SEL_Pos) …
26868 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) …
26869 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) …
26870 #define RCC_CCIPR4_I2C1SEL_2 (0x4UL << RCC_CCIPR4_I2C1SEL_Pos) …
Dstm32n647xx.h26200 #define RCC_CCIPR4_I2C1SEL_Pos (0U) macro
26201 #define RCC_CCIPR4_I2C1SEL_Msk (0x7UL << RCC_CCIPR4_I2C1SEL_Pos) …
26203 #define RCC_CCIPR4_I2C1SEL_0 (0x1UL << RCC_CCIPR4_I2C1SEL_Pos) …
26204 #define RCC_CCIPR4_I2C1SEL_1 (0x2UL << RCC_CCIPR4_I2C1SEL_Pos) …
26205 #define RCC_CCIPR4_I2C1SEL_2 (0x4UL << RCC_CCIPR4_I2C1SEL_Pos) …