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Searched refs:RCC_CCIPR3_USART1SEL_Pos (Results 1 – 5 of 5) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_rcc.h805 …KSOURCE_PCLK2 LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_USART1SEL, RCC_CCIPR3_USART1SEL_Pos, 0U)
806 …E_PLL2Q LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_USART1SEL, RCC_CCIPR3_USART1SEL_Pos, RCC_CCIP…
807 …E_PLL3Q LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_USART1SEL, RCC_CCIPR3_USART1SEL_Pos, RCC_CCIP…
808 …E_HSI LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_USART1SEL, RCC_CCIPR3_USART1SEL_Pos, RCC_CCIP…
810 …E_CSI LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_USART1SEL, RCC_CCIPR3_USART1SEL_Pos, RCC_CCIP…
811 …E_LSE LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_USART1SEL, RCC_CCIPR3_USART1SEL_Pos, RCC_CCIP…
1034 …KSOURCE LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_USART1SEL, RCC_CCIPR3_USART1SEL_Pos, 0U)
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h15138 #define RCC_CCIPR3_USART1SEL_Pos (0U) macro
15139 #define RCC_CCIPR3_USART1SEL_Msk (0x7UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000007 */
15141 #define RCC_CCIPR3_USART1SEL_0 (0x1UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000001 */
15142 #define RCC_CCIPR3_USART1SEL_1 (0x2UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000002 */
15143 #define RCC_CCIPR3_USART1SEL_2 (0x4UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000004 */
Dstm32h7s7xx.h16172 #define RCC_CCIPR3_USART1SEL_Pos (0U) macro
16173 #define RCC_CCIPR3_USART1SEL_Msk (0x7UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000007 */
16175 #define RCC_CCIPR3_USART1SEL_0 (0x1UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000001 */
16176 #define RCC_CCIPR3_USART1SEL_1 (0x2UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000002 */
16177 #define RCC_CCIPR3_USART1SEL_2 (0x4UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000004 */
Dstm32h7s3xx.h15770 #define RCC_CCIPR3_USART1SEL_Pos (0U) macro
15771 #define RCC_CCIPR3_USART1SEL_Msk (0x7UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000007 */
15773 #define RCC_CCIPR3_USART1SEL_0 (0x1UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000001 */
15774 #define RCC_CCIPR3_USART1SEL_1 (0x2UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000002 */
15775 #define RCC_CCIPR3_USART1SEL_2 (0x4UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000004 */
Dstm32h7r7xx.h15538 #define RCC_CCIPR3_USART1SEL_Pos (0U) macro
15539 #define RCC_CCIPR3_USART1SEL_Msk (0x7UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000007 */
15541 #define RCC_CCIPR3_USART1SEL_0 (0x1UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000001 */
15542 #define RCC_CCIPR3_USART1SEL_1 (0x2UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000002 */
15543 #define RCC_CCIPR3_USART1SEL_2 (0x4UL << RCC_CCIPR3_USART1SEL_Pos) /*!< 0x00000004 */