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Searched refs:RCC_CCIPR3_SPI4SEL_Pos (Results 1 – 6 of 6) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h769 …CE_PCLK2 LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SPI4SEL, RCC_CCIPR3_SPI4SEL_Pos, 0x0000000…
770 …CE_PLL2Q LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SPI4SEL, RCC_CCIPR3_SPI4SEL_Pos, RCC_CCIPR…
771 …CE_PLL3Q LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SPI4SEL, RCC_CCIPR3_SPI4SEL_Pos, RCC_CCIPR…
772 …CE_HSI LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SPI4SEL, RCC_CCIPR3_SPI4SEL_Pos, RCC_CCIPR…
773 …CE_CSI LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SPI4SEL, RCC_CCIPR3_SPI4SEL_Pos, RCC_CCIPR…
774 …CE_HSE LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SPI4SEL, RCC_CCIPR3_SPI4SEL_Pos, RCC_CCIPR…
1032 …SOURCE LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SPI4SEL, RCC_CCIPR3_SPI4SEL_Pos, 0x0000000…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h13703 #define RCC_CCIPR3_SPI4SEL_Pos (9U) macro
13704 #define RCC_CCIPR3_SPI4SEL_Msk (0x7UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000E00…
13706 #define RCC_CCIPR3_SPI4SEL_0 (0x1UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000200…
13707 #define RCC_CCIPR3_SPI4SEL_1 (0x2UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000400…
13708 #define RCC_CCIPR3_SPI4SEL_2 (0x4UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000800…
Dstm32h562xx.h14663 #define RCC_CCIPR3_SPI4SEL_Pos (9U) macro
14664 #define RCC_CCIPR3_SPI4SEL_Msk (0x7UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000E00…
14666 #define RCC_CCIPR3_SPI4SEL_0 (0x1UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000200…
14667 #define RCC_CCIPR3_SPI4SEL_1 (0x2UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000400…
14668 #define RCC_CCIPR3_SPI4SEL_2 (0x4UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000800…
Dstm32h533xx.h14252 #define RCC_CCIPR3_SPI4SEL_Pos (9U) macro
14253 #define RCC_CCIPR3_SPI4SEL_Msk (0x7UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000E00…
14255 #define RCC_CCIPR3_SPI4SEL_0 (0x1UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000200…
14256 #define RCC_CCIPR3_SPI4SEL_1 (0x2UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000400…
14257 #define RCC_CCIPR3_SPI4SEL_2 (0x4UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000800…
Dstm32h573xx.h17305 #define RCC_CCIPR3_SPI4SEL_Pos (9U) macro
17306 #define RCC_CCIPR3_SPI4SEL_Msk (0x7UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000E00…
17308 #define RCC_CCIPR3_SPI4SEL_0 (0x1UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000200…
17309 #define RCC_CCIPR3_SPI4SEL_1 (0x2UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000400…
17310 #define RCC_CCIPR3_SPI4SEL_2 (0x4UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000800…
Dstm32h563xx.h16756 #define RCC_CCIPR3_SPI4SEL_Pos (9U) macro
16757 #define RCC_CCIPR3_SPI4SEL_Msk (0x7UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000E00…
16759 #define RCC_CCIPR3_SPI4SEL_0 (0x1UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000200…
16760 #define RCC_CCIPR3_SPI4SEL_1 (0x2UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000400…
16761 #define RCC_CCIPR3_SPI4SEL_2 (0x4UL << RCC_CCIPR3_SPI4SEL_Pos) /*!< 0x00000800…