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Searched refs:RCC_CCIPR3_SAI2SEL_Pos (Results 1 – 5 of 5) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_rcc.h732 …CLKSOURCE_PLL1Q LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, 0U)
733 …CE_PLL2P LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, RCC_CCIPR…
734 …CE_PLL3P LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, RCC_CCIPR…
735 …CE_I2S_CKIN LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, RCC_CCIPR…
737 …CE_CLKP LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, RCC_CCIPR…
738 …CE_SPDIFRX LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, RCC_CCIPR…
999 …CLKSOURCE LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, 0U)
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h15166 #define RCC_CCIPR3_SAI2SEL_Pos (20U) macro
15167 #define RCC_CCIPR3_SAI2SEL_Msk (0x7UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00700000 */
15169 #define RCC_CCIPR3_SAI2SEL_0 (0x1UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00100000 */
15170 #define RCC_CCIPR3_SAI2SEL_1 (0x2UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00200000 */
15171 #define RCC_CCIPR3_SAI2SEL_2 (0x4UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00400000 */
Dstm32h7s7xx.h16200 #define RCC_CCIPR3_SAI2SEL_Pos (20U) macro
16201 #define RCC_CCIPR3_SAI2SEL_Msk (0x7UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00700000 */
16203 #define RCC_CCIPR3_SAI2SEL_0 (0x1UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00100000 */
16204 #define RCC_CCIPR3_SAI2SEL_1 (0x2UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00200000 */
16205 #define RCC_CCIPR3_SAI2SEL_2 (0x4UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00400000 */
Dstm32h7s3xx.h15798 #define RCC_CCIPR3_SAI2SEL_Pos (20U) macro
15799 #define RCC_CCIPR3_SAI2SEL_Msk (0x7UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00700000 */
15801 #define RCC_CCIPR3_SAI2SEL_0 (0x1UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00100000 */
15802 #define RCC_CCIPR3_SAI2SEL_1 (0x2UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00200000 */
15803 #define RCC_CCIPR3_SAI2SEL_2 (0x4UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00400000 */
Dstm32h7r7xx.h15566 #define RCC_CCIPR3_SAI2SEL_Pos (20U) macro
15567 #define RCC_CCIPR3_SAI2SEL_Msk (0x7UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00700000 */
15569 #define RCC_CCIPR3_SAI2SEL_0 (0x1UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00100000 */
15570 #define RCC_CCIPR3_SAI2SEL_1 (0x2UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00200000 */
15571 #define RCC_CCIPR3_SAI2SEL_2 (0x4UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00400000 */