Searched refs:RCC_CCIPR3_SAI2SEL_2 (Results 1 – 6 of 6) sorted by relevance
466 #define RCC_SAI2CLKSOURCE_CLKP RCC_CCIPR3_SAI2SEL_2 /*!< Clock peripheral output selection …467 #define RCC_SAI2CLKSOURCE_SPDIF (RCC_CCIPR3_SAI2SEL_2 | RCC_CCIPR3_SAI2SEL_0) /*!< SPDIF output…
737 … LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, RCC_CCIPR3_SAI2SEL_2)
15171 #define RCC_CCIPR3_SAI2SEL_2 (0x4UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00400000 */ macro
16205 #define RCC_CCIPR3_SAI2SEL_2 (0x4UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00400000 */ macro
15803 #define RCC_CCIPR3_SAI2SEL_2 (0x4UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00400000 */ macro
15571 #define RCC_CCIPR3_SAI2SEL_2 (0x4UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00400000 */ macro