Searched refs:RCC_CCIPR3_SAI2SEL_0 (Results 1 – 6 of 6) sorted by relevance
463 #define RCC_SAI2CLKSOURCE_PLL2P RCC_CCIPR3_SAI2SEL_0 /*!< PLL2 'P' output selection */465 #define RCC_SAI2CLKSOURCE_PIN (RCC_CCIPR3_SAI2SEL_1 | RCC_CCIPR3_SAI2SEL_0) /*!< I2S_PIN sele…467 #define RCC_SAI2CLKSOURCE_SPDIF (RCC_CCIPR3_SAI2SEL_2 | RCC_CCIPR3_SAI2SEL_0) /*!< SPDIF output…
733 … LL_CLKSOURCE(CCIPR3_OFFSET, RCC_CCIPR3_SAI2SEL, RCC_CCIPR3_SAI2SEL_Pos, RCC_CCIPR3_SAI2SEL_0)736 RCC_CCIPR3_SAI2SEL_0)739 RCC_CCIPR3_SAI2SEL_0)
15169 #define RCC_CCIPR3_SAI2SEL_0 (0x1UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00100000 */ macro
16203 #define RCC_CCIPR3_SAI2SEL_0 (0x1UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00100000 */ macro
15801 #define RCC_CCIPR3_SAI2SEL_0 (0x1UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00100000 */ macro
15569 #define RCC_CCIPR3_SAI2SEL_0 (0x1UL << RCC_CCIPR3_SAI2SEL_Pos) /*!< 0x00100000 */ macro
