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Searched refs:RCC_CCIPR2_PLLSAI2DIVR_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_rcc.h1855 …SAI2CFGR_PLLSAI2R_Pos ) + 1U) << 1U) * (2UL << ((__PLLSAI2DIVR__) >> RCC_CCIPR2_PLLSAI2DIVR_Pos))))
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r5xx.h12990 #define RCC_CCIPR2_PLLSAI2DIVR_Pos (16U) macro
12991 #define RCC_CCIPR2_PLLSAI2DIVR_Msk (0x3UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00030000 …
12993 #define RCC_CCIPR2_PLLSAI2DIVR_0 (0x1UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00010000 …
12994 #define RCC_CCIPR2_PLLSAI2DIVR_1 (0x2UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00020000 …
Dstm32l4r7xx.h13489 #define RCC_CCIPR2_PLLSAI2DIVR_Pos (16U) macro
13490 #define RCC_CCIPR2_PLLSAI2DIVR_Msk (0x3UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00030000 …
13492 #define RCC_CCIPR2_PLLSAI2DIVR_0 (0x1UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00010000 …
13493 #define RCC_CCIPR2_PLLSAI2DIVR_1 (0x2UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00020000 …
Dstm32l4s5xx.h13337 #define RCC_CCIPR2_PLLSAI2DIVR_Pos (16U) macro
13338 #define RCC_CCIPR2_PLLSAI2DIVR_Msk (0x3UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00030000 …
13340 #define RCC_CCIPR2_PLLSAI2DIVR_0 (0x1UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00010000 …
13341 #define RCC_CCIPR2_PLLSAI2DIVR_1 (0x2UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00020000 …
Dstm32l4s7xx.h13836 #define RCC_CCIPR2_PLLSAI2DIVR_Pos (16U) macro
13837 #define RCC_CCIPR2_PLLSAI2DIVR_Msk (0x3UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00030000 …
13839 #define RCC_CCIPR2_PLLSAI2DIVR_0 (0x1UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00010000 …
13840 #define RCC_CCIPR2_PLLSAI2DIVR_1 (0x2UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00020000 …
Dstm32l4p5xx.h13807 #define RCC_CCIPR2_PLLSAI2DIVR_Pos (16U) macro
13808 #define RCC_CCIPR2_PLLSAI2DIVR_Msk (0x3UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00030000 …
13810 #define RCC_CCIPR2_PLLSAI2DIVR_0 (0x1UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00010000 …
13811 #define RCC_CCIPR2_PLLSAI2DIVR_1 (0x2UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00020000 …
Dstm32l4q5xx.h14318 #define RCC_CCIPR2_PLLSAI2DIVR_Pos (16U) macro
14319 #define RCC_CCIPR2_PLLSAI2DIVR_Msk (0x3UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00030000 …
14321 #define RCC_CCIPR2_PLLSAI2DIVR_0 (0x1UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00010000 …
14322 #define RCC_CCIPR2_PLLSAI2DIVR_1 (0x2UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00020000 …
Dstm32l4r9xx.h16621 #define RCC_CCIPR2_PLLSAI2DIVR_Pos (16U) macro
16622 #define RCC_CCIPR2_PLLSAI2DIVR_Msk (0x3UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00030000 …
16624 #define RCC_CCIPR2_PLLSAI2DIVR_0 (0x1UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00010000 …
16625 #define RCC_CCIPR2_PLLSAI2DIVR_1 (0x2UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00020000 …
Dstm32l4s9xx.h16968 #define RCC_CCIPR2_PLLSAI2DIVR_Pos (16U) macro
16969 #define RCC_CCIPR2_PLLSAI2DIVR_Msk (0x3UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00030000 …
16971 #define RCC_CCIPR2_PLLSAI2DIVR_0 (0x1UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00010000 …
16972 #define RCC_CCIPR2_PLLSAI2DIVR_1 (0x2UL << RCC_CCIPR2_PLLSAI2DIVR_Pos) /*!< 0x00020000 …